The ARP along with the data page pointer (DP) carry bit (C) and a variety of other fields are located in the status registers of the 'C5x. These registers are displayed in the CPU register window of the HLL debugger but it is inconvenient to observe the value of any one individual field.The HLL debugger has two features that can help display the desired field(s) in an easy-to-observe manner.
This article provides an overview of the DM816x, C6A816x, and AM389x product families and has been contributed to the TI Embedded Processors Wiki. To see the most recently updated version or to contri
This application bulletin provides information on the operation and usage of the ADS1201U evaluation fixture and provides detailed description of the digital filter design implemented into Xilinx XC40
The ADS8342 16-bit, bipolar input, parallel output analog-to-digital converter has a number of features that allow for an easy interface to many of the TMS320? DSP family of digital signal processors
Using a question-and-answer format, advantages of TI?s GTLP devices, particularly for backplane applications, are presented, as well as differences between GTLP and GTL/LVDS devices. Applicable topics
This application report presents an analysis on the use of the 15-clock cycle method of operation for the ADS7841 and ADS7844 described in their respective data sheets. The advent of commercially available processors such as the TMS470 no longer restricts users from implementing the 15-clock method with simple microprocessors. This method however does present some challenges to the software inte
Due to its discrete nature DSPs represent variables and performs arithmetic functions with a finite word length. This produces three effects: the selection of filter transfer functions is quantized with filter poles and zeros existing only at specific locations in the z plane; the input is quantized; and noise is introduced from DSP multiplication and division operations. This document shows how
With the ever-growing need for battery-operated systems the need for low-power designs has increased significantly in recent years. These low-power applications have expanded to include high-speed DSP designs. It is necessary to design with high-speed devices while maintaining an overall power reduction. This document discusses a number of ways to reduce your system power ranging from the use of
This application report provides a schematic and design procedure for implementing a dynamically adjustable output for the TPS63000 using a digital-to-analog converter or other input voltage source.
The bq2031 fast-charge IC has two primary functions: lead-acid battery charge control and switch-mode power conversion control. This application note discusses the operation of the bq2031 and describes a switch-mode buck regulator charger using the bq2031.
This document discusses interrupt handling and the effect of interrupts on the pipeline. If an interrupt is pending and is subsequently enabled by a CLRC instruction where would it be taken and what happens when it returns from the ISR?
With the introduction of the MPY634 multipliers wideband analog multiplication need no longer be a multicap affair or imply performance compromises. Along with its 10MHz small-signal bandwidth the four-quadrant chip has a laser-trimmed DC accuracy of 0.25% and adjustable scale factor and the ability to drive loads down to 2kΩ.
The Fast Fourier Transform (FFT) is an efficient means for computing the Discrete Fourier Transform (DFT). It is one of the most widely used computational elements in Digital Signal Processing (DSP) a