FIFO memories are used as high-speed data-stream buffers for maximizing throughput between buses having different data-transfer speeds. The increased processing speeds of microprocessors resulted in

Portable battery sources are constantly challenged by the handheld applications' increasing functionality and power demands. By better understanding the applications' energy consumption designers can produce energy-efficient solutions that will conserve battery life and provide a better end-user experience.

TVP5154 PCB Layout Guidelines

The UC 1901 isolated feedback generator solves many of the problems associated with closing a feedback control loop across a voltage isolation boundary. As a stable and reliable alternative to an optical coupler these devices feature an amplitude modulation system that allows a loop error signal to be coupled with a small R. F. transformer or capacitor. This application note discusses the functi

This application note discusses how system designers are able to use Channel Link II ser/Des to improve old and new channel link designs.

M-LVDS devices provide true multipoint functionality. M-LVDS standard contention provisions and Type-2 M-LVDS receivers allow user of these devices in wired-logic signaling designs. This application report discusses M-LVDS features that support wired-logic signaling compares this to LVDS features and demonstrates wired-OR signaling with Texas Instruments M-LVDS complaint transceivers.

Application Note 271 Applying the New CMOS MICRO-DAC

Designing with the TRF6900 Single-Chip RF Transceiver

ADS8332 ADS8331 Interfacing the ADS8332 to TMS320F28335 DSP LEAVE IN MS WORD

This application report provides a guide to designing ATCA compliant clock distribution networks using M-LVDS devices. The application report consists of a quick description of an ATCA synchronization clock interface an overview of M-LVDS standard an extensive discussion on performance of M-LVDS devices in an ATCA backplane and a set of design recommendations and rules that will assist you in bu

This quick start guide is intended to assist existing users of the MSP430 line of products in converting existing code to the new MSP430x5xx modules. While the modules operate in accordance with previ

This application report is a collection of PSpice compatible models for Texas Instruments amplifiers.

If the input voltage to a TPS249X controlled system is reversed, The TPS249X will be destroyed and the load will be exposed to the reverse voltage. This app note proposes a solution for both. A sche

Clause #33 PSE conformance testing performed on the TPS23861EVM-613.

This reference design takes into account the voltage current and start-up requirements of the TMS320F280x Digital Signal Processor (DSP) families. The operating input voltage ranges from 3.4 V to 6 V. This design is a high-efficiency solution that provides two voltage rails (1.8-V core supply and 3.3-V I/O supply) and an active-low reset signal to the DSP. This design can be easily adapted to fi

During various occasions a digital amplifier can generate a click or a pop. The click is generated at changes of the operational modes of the amplifier e.g. charging ofcapacitors or mute/unmute. For Class D amplifier systems click is typically at PWM start and stop. The audibility of a click depends on the system amplifier and speaker. Also perception of the click is subjective. This

This document describes the FlatLinkE point-to-point data-transmission interface that provides better than a two-to-one reduction in the number of signal lines used for synchronous parallel data-bus structures.

The run-time support library (RTS) supplied with each TI DSP C/C++ compiler provides C language I/O (CIO) in the form of the high-level functions such as fopen and printf and the low-level functions such as open and write which use device drivers to complete CIO requests. The RTS provides a way for the user to define a new device driver. This provides an easy way to use the sophisticated bufferi