The AD5684, a member of the nanoDAC+™ family, is a low power, quad, 12-bit buffered voltage output DAC. The device includes a gain select pin giving a full-scale output of 2.5 V (gain = 1) or 5 V (gain = 2). The device operates from a single 2.7 V to 5.5 V supply, is guaranteed monotonic by design, and exhibits less than 0.1% FSR gain error and 1.5 mV offset error performance. The device is available in a 3 mm × 3 mm LFCSP and a TSSOP package.The AD5684 also incorporates a power-on reset circuit and a RSTSEL pin that ensures that the DAC outputs power up to zero scale or midscale and remain at that level until a valid write takes place. Each part contains a per-channel power-down feature that reduces the current consumption of the device to 4 μA at 3 V while in power-down mode.The AD5684 employs a versatile SPI interface that operates at clock rates up to 50 MHz, and all devices contain a VLOGIC pin intended for 1.8 V/3 V/5 V logic.Product Highlights High Relative Accuracy (INL): ±1 LSB maximum Excellent DC Performance. Total unadjusted error: ±0.1% of FSR maximum Offset error: ±1.5 mV maximum Gain error: ±0.1% of FSR maximum Two Package Options: 3 mm × 3 mm, 16-lead LFCSP and 16-lead TSSOPApplications Digital gain and offset adjustment Programmable attenuators Process control (PLC I/O cards) Industrial automation Data acquisition systems

The AD5684R nanoDAC+™ is a quad, 12-bit, rail-to-rail, voltage output DAC. The device includes a 2.5V, 2ppm/˚C internal reference (enabled by default) and a gain select pin giving a full-scale output of 2.5V (gain=1) or 5V (gain=2). The device operates from a single 2.7 V to 5.5 V supply, is guaranteed monotonic by design and exhibits less than 0.1% FSR gain error and 1.5mV offset error performance. The device is available in a 3mm X 3mm LFCSP and a TSSOP package.The AD5684R also incorporates a power-on-reset circuit and a RSTSEL pin that ensures the DAC outputs power up to zero-scale or midscale, and remain there until a valid write takes place. Each device contains a per-channel power-down feature that reduces the current consumption of the device to 4 uA at 3 V while in power-down mode.The AD5684R employs a versatile SPI interface that operates at clock rates up to 50 MHz and includes a VLOGIC pin intended for 1.8V/3V/5V logic.Product Highlights High relative accuracy: AD5684R (12-bit): ±1LSB INL max Low drift on-chip reference: 2.5V, 2ppm/°C temperature drift Two package options: 3mm × 3mm 16-lead LFCSP or 16-lead TSSOPApplications Optical transceivers Base-station power amplifiers Process control (PLC I/O cards) Industrial automation Data acquisition systems

The AD5684R nanoDAC+™ is a quad, 12-bit, rail-to-rail, voltage output DAC. The device includes a 2.5V, 2ppm/˚C internal reference (enabled by default) and a gain select pin giving a full-scale output of 2.5V (gain=1) or 5V (gain=2). The device operates from a single 2.7 V to 5.5 V supply, is guaranteed monotonic by design and exhibits less than 0.1% FSR gain error and 1.5mV offset error performance. The device is available in a 3mm X 3mm LFCSP and a TSSOP package.The AD5684R also incorporates a power-on-reset circuit and a RSTSEL pin that ensures the DAC outputs power up to zero-scale or midscale, and remain there until a valid write takes place. Each device contains a per-channel power-down feature that reduces the current consumption of the device to 4 uA at 3 V while in power-down mode.The AD5684R employs a versatile SPI interface that operates at clock rates up to 50 MHz and includes a VLOGIC pin intended for 1.8V/3V/5V logic.Product Highlights High relative accuracy: AD5684R (12-bit): ±1LSB INL max Low drift on-chip reference: 2.5V, 2ppm/°C temperature drift Two package options: 3mm × 3mm 16-lead LFCSP or 16-lead TSSOPApplications Optical transceivers Base-station power amplifiers Process control (PLC I/O cards) Industrial automation Data acquisition systems

The AD5686R nanoDAC+™ is a quad, 16-bit, rail-to-rail, voltage output DAC. The device includes a 2.5V, 2ppm/˚C internal reference (enabled by default) and a gain select pin giving a full-scale output of 2.5V (gain=1) or 5V (gain=2).The device operates from a single 2.7 V to 5.5 V supply, is guaranteed monotonic by design and exhibits less than 0.1% FSR gain error and 1.5mV offset error performance. The device is available in a 3mm X 3mm LFCSP and a TSSOP package.The AD5686R also incorporates a power-on-reset circuit and a RSTSEL pin that ensures the DAC outputs power up to zero-scale or midscale, and remain there until a valid write takes place. Each device contains a per-channel power-down feature that reduces the current consumption of the device to 4 uA at 3 V while in power-down mode.The AD5686R employs a versatile SPI interface that operates at clock rates up to 50 MHz and includes a VLOGIC pin intended for 1.8V/3V/5V logic.Product Highlights High Relative Accuracy: AD5686R (16-bit): ±2LSB INL max Low drift on-chip reference: 2.5 V, 2 ppm/°C temperature drift. Two package options: 3mm × 3mm 16 lead LFCSP or 16 lead TSSOPApplications Optical transceivers Base-station power amplifiers Process control (PLC I/O cards) Industrial automation Data acquisition systems

The AD5689/AD5687 members of the nanoDAC+™ family arelow power, dual, 16-/12-bit, buffered voltage output digital-to-analogconverters (DACs). The devices include a gain select pingiving a full-scale output of 2.5 V (gain = 1) or 5 V (gain = 2). TheAD5689/AD5687 operate from a single 2.7 V to 5.5 V supply, areguaranteed monotonic by design, and exhibit less than 0.1% FSRgain error and 1.5 mV offset error performance. Both devices areavailable in a 3 mm × 3 mm LFCSP and a TSSOP package.The AD5689/AD5687 also incorporate a power-on reset circuitand a RSTSEL pin that ensure that the DAC outputs power upto zero scale or midscale and remain there until a valid writetakes place. Each part contains a per channel power-down featurethat reduces the current consumption of the device to 4 µA at3 V while in power-down mode.The AD5689/AD5687 uses a versatile serial peripheral interfacethat operates at clock rates up to 50 MHz. Both devices containa VLOGIC pin that is intended for 1.8 V/3 V/5 V logic.Product Highlights High Relative Accuracy (INL). AD5687 (12-bit): ±1 LSB maximum Excellent DC Performance. Total unadjusted error: ±0.1% of FSR maximum Offset error: ±1.5 mV maximum Gain error: ±0.1% of FSR maximum Two Package Options. 3 mm × 3 mm, 16-lead LFCSP or 16-lead TSSOPApplications Optical transceivers Base station power amplifiers Process control (PLC I/O cards) Industrial automation Data acquisition systems

The AD5689/AD5687 members of the nanoDAC+™ family arelow power, dual, 16-/12-bit, buffered voltage output digital-to-analogconverters (DACs). The devices include a gain select pingiving a full-scale output of 2.5 V (gain = 1) or 5 V (gain = 2). TheAD5689/AD5687 operate from a single 2.7 V to 5.5 V supply, areguaranteed monotonic by design, and exhibit less than 0.1% FSRgain error and 1.5 mV offset error performance. Both devices areavailable in a 3 mm × 3 mm LFCSP and a TSSOP package.The AD5689/AD5687 also incorporate a power-on reset circuitand a RSTSEL pin that ensure that the DAC outputs power upto zero scale or midscale and remain there until a valid writetakes place. Each part contains a per channel power-down featurethat reduces the current consumption of the device to 4 µA at3 V while in power-down mode.The AD5689/AD5687 uses a versatile serial peripheral interfacethat operates at clock rates up to 50 MHz. Both devices containa VLOGIC pin that is intended for 1.8 V/3 V/5 V logic.Product Highlights High Relative Accuracy (INL). AD5687 (12-bit): ±1 LSB maximum Excellent DC Performance. Total unadjusted error: ±0.1% of FSR maximum Offset error: ±1.5 mV maximum Gain error: ±0.1% of FSR maximum Two Package Options. 3 mm × 3 mm, 16-lead LFCSP or 16-lead TSSOPApplications Optical transceivers Base station power amplifiers Process control (PLC I/O cards) Industrial automation Data acquisition systems

The AD5689/AD5687 members of the nanoDAC+™ family arelow power, dual, 16-/12-bit, buffered voltage output digital-to-analogconverters (DACs). The devices include a gain select pingiving a full-scale output of 2.5 V (gain = 1) or 5 V (gain = 2). TheAD5689/AD5687 operate from a single 2.7 V to 5.5 V supply, areguaranteed monotonic by design, and exhibit less than 0.1% FSRgain error and 1.5 mV offset error performance. Both devices areavailable in a 3 mm × 3 mm LFCSP and a TSSOP package.The AD5689/AD5687 also incorporate a power-on reset circuitand a RSTSEL pin that ensure that the DAC outputs power upto zero scale or midscale and remain there until a valid writetakes place. Each part contains a per channel power-down featurethat reduces the current consumption of the device to 4 µA at3 V while in power-down mode.The AD5689/AD5687 uses a versatile serial peripheral interfacethat operates at clock rates up to 50 MHz. Both devices containa VLOGIC pin that is intended for 1.8 V/3 V/5 V logic.Product Highlights High Relative Accuracy (INL). AD5687 (12-bit): ±1 LSB maximum Excellent DC Performance. Total unadjusted error: ±0.1% of FSR maximum Offset error: ±1.5 mV maximum Gain error: ±0.1% of FSR maximum Two Package Options. 3 mm × 3 mm, 16-lead LFCSP or 16-lead TSSOPApplications Optical transceivers Base station power amplifiers Process control (PLC I/O cards) Industrial automation Data acquisition systems

The AD5689R/AD5687R members of the nanoDAC+™ family are low power, dual, 16-/12-bit buffered voltage output digital-to-analog converters (DACs). The devices include a 2.5 V, 2 ppm/°C internal reference (enabled by default) and a gain select pin giving a full-scale output of 2.5 V (gain = 1) or 5 V (gain = 2). The devices operate from a single 2.7 V to 5.5 V supply, are guaranteed monotonic by design, and exhibit less than 0.1% FSR gain error and 1.5 mV offset error performance. Both devices are available in a 3 mm × 3 mm LFCSP and a TSSOP package.The AD5689R/AD5687R also incorporate a power-on reset circuit and a RSTSEL pin that ensure that the DAC outputs power up to zero scale or midscale and remain there until a valid write takes place. Each part contains a per channel power-down feature that reduces the current consumption of the device to 4 μA at 3 V while in power-down mode.The AD5689R/AD5687R use a versatile serial peripheral interface (SPI) that operates at clock rates up to 50 MHz. Both devices contain a VLOGIC pin that is intended for 1.8 V/3 V/5 V logic.Product Highlights High Relative Accuracy (INL). AD5689R (16-bit): ±2 LSB maximum AD5687R (12-bit): ±1 LSB maximum Low Drift 2.5 V On-Chip Reference.  2 ppm/°C typical temperature coefficient  5 ppm/°C maximum temperature coefficient  Two Package Options.  3 mm × 3 mm, 16-lead LFCSP 16-lead TSSOP Applications Optical transceivers Base station power amplifiers Process control (PLC I/O cards) Industrial automation Data acquisition systems

The AD5694R is a low power, quad, 16-bit buffered voltage output DAC. The device includes a 2.5 V, 2 ppm/°C internal reference (enabled by default) and a gain select pin giving a full-scale output of 2.5 V (gain = 1) or 5 V (gain = 2). The device operates from a single 2.7 V to 5.5 V supply, is guaranteed monotonic by design, and exhibits less than 0.1% FSR gain error and 1.5 mV offset error performance. The device is available in a 3 mm × 3 mm LFCSP and a TSSOP package.The AD5694R also incorporates a power-on reset circuit and a RSTSEL pin that ensures that the DAC outputs power up to zero scale or midscale and remain there until a valid write takes place. Each part contains a per-channel power-down feature that reduces the current consumption of the device to 4 μA at 3 V while in power-down mode.The AD5694R uses a versatile 2-wire serial interface that operates at clock rates up to 400 kHz, and includes a VLOGIC pin intended for 1.8 V/3 V/5 V logic.Product Highlights High Relative Accuracy (INL). AD5694R (12-bit): ±1 LSB maximum. Low Drift 2.5 V On-Chip Reference. 2 ppm/°C typical temperature coefficient. 5 ppm/°C maximum temperature coefficient. Two Package Options. 3 mm × 3 mm, 16-lead LFCSP. 16-lead TSSOP.Applications Optical transceivers Base-station power amplifiers Process control (PLC I/O cards) Industrial automation Data acquisition systems

The AD5695R is a low power, quad, 14-bit buffered voltage output DAC. The device includes a 2.5 V, 2 ppm/°C internal reference (enabled by default) and a gain select pin giving a full-scale output of 2.5 V (gain = 1) or 5 V (gain = 2). The device operates from a single 2.7 V to 5.5 V supply, is guaranteed monotonic by design, and exhibits less than 0.1% FSR gain error and 1.5 mV offset error performance. The device is available in a 3 mm × 3 mm LFCSP and a TSSOP package.The AD5695R also incorporates a power-on reset circuit and a RSTSEL pin that ensures that the DAC outputs power up to zero scale or midscale and remain there until a valid write takes place. Each part contains a per-channel power-down feature that reduces the current consumption of the device to 4 μA at 3 V while in power-down mode.The AD5695R uses a versatile 2-wire serial interface that operates at clock rates up to 400 kHz, and includes a VLOGIC pin intended for 1.8 V/3 V/5 V logic.Product Highlights High Relative Accuracy (INL). AD5695R (14-bit): ±1 LSB maximum. Low Drift 2.5 V On-Chip Reference. 2 ppm/°C typical temperature coefficient. 5 ppm/°C maximum temperature coefficient. Two Package Options. 3 mm × 3 mm, 16-lead LFCSP. 16-lead TSSOP.Applications Optical transceivers Base-station power amplifiers Process control (PLC I/O cards) Industrial automation Data acquisition systems

The AD5696, a member of the nanoDAC+™ family, is a low power, quad, 16-bit buffered voltage output DAC. The device includes a gain select pin giving a full-scale output of 0V to VREF (gain = 1) or 0V to 2VREF (gain = 2) The device operates from a single 2.7 V to 5.5 V supply, is guaranteed monotonic by design, and exhibits less than 0.1% FSR gain error and 1.5 mV offset error performance. The device is available in a 3 mm × 3 mm LFCSP package and in a TSSOP package.The AD5696 incorporates a power-on reset circuit and a RSTSEL pin; the RSTSEL pin ensures that the DAC outputs power up to zero scale or midscale and remain at that level until a valid write takes place. The part contains a per-channel power-down feature that reduces the current consumption of the device in power-down mode to 4 µA at 3 V.The AD5696 uses a versatile 2-wire serial interface that operates at clock rates up to 400 kHz and includes a VLOGIC pin intended for 1.8 V/3 V/5 V logic.Product Hightlights High Relative Accuracy (INL): ±2 LSB maximum Excellent DC Performance: Total unadjusted error: ±0.1% of FSR maximum Offset error: ±1.5 mV maximum Gain error: ±0.1% of FSR maximum Two Package Options: 3 mm × 3 mm, 16-lead LFCSP and 16-lead TSSOPApplications Digital gain and offset adjustment Programmable attenuators Process control (PLC I/O cards) Industrial automation Data acquisition systems

The AD5700/AD5700-1 are single-chip solutions, designedand specified to operate as a HART® FSK half-duplex modem,complying with the HART physical layer requirements. TheAD5700/AD5700-1 integrate all of the necessary filtering, signaldetection, modulating, demodulating and signal generationfunctions, thus requiring few external components. The 0.5%precision internal oscillator on the AD5700-1 greatly reducesthe board space requirements, making it ideal for line-poweredapplications in both master and slave configurations. The maximumsupply current consumption is 115µA, making theAD5700/AD5700-1 an optimal choice for low power loop-powered applications.Transmit waveforms are phase continuous 1200 Hz and2200 Hz sinusoids. The AD5700/AD5700-1 contain accuratecarrier detect circuitry and use a standard UART interface.Applications Field transmitters HART multiplexers PLC and DCS analog I/O modules HART network connectivity

The AD5790 is a single 20-bit, voltage out DAC that operates from a bipolar supply up to 33V. Reference buffers are also provided on-chip The AD5790 accepts a positive reference input in the range of 5V to VDD – 2.5V and a negative reference input in the range of VSS + 2.5v to 0V. The AD5790 offers a relative accuracy of +/-2 LSB's max and operation is guaranteed monotonic with a -1 LSB to +3 LSB's DNL specification.The part uses a versatile 3-wire serial interface that operates at clock rates up to 35 MHz and is compatible with standard SPI®, QSPI™, MICROWIRE™, and DSP interface standards. The part incorporates a power-on reset circuit that ensures the DAC output powers up to 0V and in a known output impedance state and remains in this state until a valid write to the device takes place. The part provides a disable feature that places the output in a defined load state.PRODUCT HIGHLIGHTS 20-bit resolution Wide power supply range of up to ±16.5 V. −40°C to +125°C operating temperature range. Low 8 nV/√Hz noise. Low ±0.018 ppm/°C gain error temperature coefficient.APPLICATIONS Medical instrumentation Test and measurement Industrial control Scientific and aerospace instrumentation Data acquisition systems Digital gain and offset adjustment Power supply control

The MAX14626 current loop protector features a current-limit switch to prevent damage to the analog input module from sensor failure. The current-limit switch features a 25Ω (typ) on-resistance and operates from a +2.3V to +36V input voltage range. The accurate current limit is set to 30mA, making the part ideal for protecting the sensor reading devices.The MAX14626 handles an overcurrent event in a continuous current-limit mode. Additional safety features include thermal shutdown to prevent overheating and reverse-input blocking to protect from being reverse connected into the sensor.The device is available in a tiny 6-pin (3mm x 3mm), TDFN exposed pad package and is specified over the -40°C to +85°C extended temperature range.ApplicationsIndustrial Current Loop Control

The MAX14627/MAX14628 provide a simple solution for detecting the insertion and managing the operation of a 3.5mm stereo headset with a microphone. These devices integrate all circuitry needed to detect SEND/END button press events and generate required microphone bias voltages, and are fully compatible with Windows® Mobile 7.The devices need only three GPIOs from the host controller to select between call mode and standby mode, and monitor the SEND/END and jack insertion status. In call mode, the low-noise LDO is enabled to provide DC bias to the externally preamplified microphone. In standby mode, microphone low-power pulsing is enabled to reduce supply current while waiting for a SEND/END button press event. Two open-drain outputs signal the host controller when an insertion/removal or SEND/END button press event occurs. If a 3P headset without a microphone is inserted, the low-power pulsing can be disabled by setting the MODE input to high impedance.The MAX14627 operates from a 2.5V to 5.5V input voltage supply and features an internal 2.2V LDO output, while the MAX14628 operates from a 3.1V to 5.5V voltage supply and features an internal 2.8V LDO output voltage. Both devices control jack insertion detection by monitoring a 3.5mm socket with a normally open jack insertion switch. Additionally, the MAX14628 features open microphone detection.The MAX14627/MAX14628 are available in an 8-pin TDFN package, and are fully specified over the -40°C to +85°C extended temperature range.ApplicationsCell PhonesPortable Media PlayersTablet/Laptop PCs

The MAX14627/MAX14628 provide a simple solution for detecting the insertion and managing the operation of a 3.5mm stereo headset with a microphone. These devices integrate all circuitry needed to detect SEND/END button press events and generate required microphone bias voltages, and are fully compatible with Windows® Mobile 7.The devices need only three GPIOs from the host controller to select between call mode and standby mode, and monitor the SEND/END and jack insertion status. In call mode, the low-noise LDO is enabled to provide DC bias to the externally preamplified microphone. In standby mode, microphone low-power pulsing is enabled to reduce supply current while waiting for a SEND/END button press event. Two open-drain outputs signal the host controller when an insertion/removal or SEND/END button press event occurs. If a 3P headset without a microphone is inserted, the low-power pulsing can be disabled by setting the MODE input to high impedance.The MAX14627 operates from a 2.5V to 5.5V input voltage supply and features an internal 2.2V LDO output, while the MAX14628 operates from a 3.1V to 5.5V voltage supply and features an internal 2.8V LDO output voltage. Both devices control jack insertion detection by monitoring a 3.5mm socket with a normally open jack insertion switch. Additionally, the MAX14628 features open microphone detection.The MAX14627/MAX14628 are available in an 8-pin TDFN package, and are fully specified over the -40°C to +85°C extended temperature range.ApplicationsCell PhonesPortable Media PlayersTablet/Laptop PCs

The MAX14630/MAX14632 are USB adapter emulators with automatic host charger identification circuitry for USB dedicated chargers.The devices allow USB wall adapters, travel chargers, and other dedicated chargers to identify themselves as a USB dedicated charger to USB devices, an Apple charger to Apple products, and a Samsung Galaxy dedicated charger port to legacy D+/D- short detection devices that use the D+ pullup of the USB transceiver.The devices feature a control input that allows for charger mode selection. The MAX14630 supports both Apple 2A and USB Battery Charger (BC) revision 1.2 specification compliant devices in Autodetection 2A mode and Samsung Galaxy Tablet 2A devices in SS 2A mode. The MAX14632 supports Autodetection 2A mode as well as Autodetection 1A mode for compatibility with most Apple and USB BCcompliant devices.The devices are available in a 5-pin (2.9mm x 1.6mm) TSOT package and are specified over the -40°C to +85°C extended temperature range.ApplicationsUniversal Chargers including iPod®/iPad®/iPhone®USB Car Chargers and Cigarette Lighter AdaptersUSB Wall Chargers and Travel Adapters

The MAX14576/MAX14636/MAX14637 are USB charger detectors. The MAX14576/MAX14636/MAX14637 will pass USB Battery Charger Specification Revision 1.2 (USB BC 1.2) compliance tests. The MAX14636/MAX14637 can also detect Apple chargers, and other nonstandard types. These devices are capable of detecting multiple USB battery charging methods including standard downstream ports (SDP), charging downstream ports (CDP), and dedicated charger ports (DCP). The devices also feature USB BC 1.2 defined dead-battery option support.The MAX14576/MAX14636/MAX14637 feature analog switches that are capable of passing USB Hi-Speed, full-speed, and low-speed signals. The switches have low on-resistance (3Ω, typ) and low on-capacitance (4.5pF, typ). The CDN and CDP are high ESD protected up to ±15kV Human Body Model (HBM), ±15kV IEC61000-4-2 Air Gap Discharge, and ±8kV IEC61000-4-2 Contact Discharge.The MAX14576/MAX14636/MAX14637 are available in a 10-pin (1.6mm x 2.1mm) UTQFN package and operate over the -40°C to +85°C extended temperature range.ApplicationsCell PhonesDigital CameraseBooksPortable Industrial ProductsTablets

The MAX14576/MAX14636/MAX14637 are USB charger detectors. The MAX14576/MAX14636/MAX14637 will pass USB Battery Charger Specification Revision 1.2 (USB BC 1.2) compliance tests. The MAX14636/MAX14637 can also detect Apple chargers, and other nonstandard types. These devices are capable of detecting multiple USB battery charging methods including standard downstream ports (SDP), charging downstream ports (CDP), and dedicated charger ports (DCP). The devices also feature USB BC 1.2 defined dead-battery option support.The MAX14576/MAX14636/MAX14637 feature analog switches that are capable of passing USB Hi-Speed, full-speed, and low-speed signals. The switches have low on-resistance (3Ω, typ) and low on-capacitance (4.5pF, typ). The CDN and CDP are high ESD protected up to ±15kV Human Body Model (HBM), ±15kV IEC61000-4-2 Air Gap Discharge, and ±8kV IEC61000-4-2 Contact Discharge.The MAX14576/MAX14636/MAX14637 are available in a 10-pin (1.6mm x 2.1mm) UTQFN package and operate over the -40°C to +85°C extended temperature range.ApplicationsCell PhonesDigital CameraseBooksPortable Industrial ProductsTablets

The MAX14576/MAX14636/MAX14637 are USB charger detectors. The MAX14576/MAX14636/MAX14637 will pass USB Battery Charger Specification Revision 1.2 (USB BC 1.2) compliance tests. The MAX14636/MAX14637 can also detect Apple chargers, and other nonstandard types. These devices are capable of detecting multiple USB battery charging methods including standard downstream ports (SDP), charging downstream ports (CDP), and dedicated charger ports (DCP). The devices also feature USB BC 1.2 defined dead-battery option support.The MAX14576/MAX14636/MAX14637 feature analog switches that are capable of passing USB Hi-Speed, full-speed, and low-speed signals. The switches have low on-resistance (3Ω, typ) and low on-capacitance (4.5pF, typ). The CDN and CDP are high ESD protected up to ±15kV Human Body Model (HBM), ±15kV IEC61000-4-2 Air Gap Discharge, and ±8kV IEC61000-4-2 Contact Discharge.The MAX14576/MAX14636/MAX14637 are available in a 10-pin (1.6mm x 2.1mm) UTQFN package and operate over the -40°C to +85°C extended temperature range.ApplicationsCell PhonesDigital CameraseBooksPortable Industrial ProductsTablets