The ADG1634L is a monolithic industrial CMOS (iCMOS?) analog switch comprising four independently selectable single-pole, double-throw (SPDT) switches, respectively.All channels exhibit break-before-make switching action that prevents momentary shorting when switching channels. An EN input on the ADG1634L is used to enable or disable the device. When disabled, all channels are switched off. The switch is enabled with a Logic 1 EN input, while the INx input defines the state of the SPDT switch (see Table 12 in the data sheet).The ultralow on resistance and on-resistance flatness of the switch makes it an ideal solution for data acquisition and gain switching applications, where low distortion is critical. iCMOS construction ensures ultra low power dissipation, making the device ideally suited for portable and battery-powered instruments.An external VL supply provides flexibility for lower logic control. The ADG1634L is both 1.2 V and 1.8 V JEDEC standard compliant.APPLICATIONS Communication systems Medical systems Audio signal routing Video signal routing Automatic test equipment Data acquisition systems Battery-powered systems FPGA and microcontroller systems Sample-and-hold systems Relay replacementsPRODUCT HIGHLIGHTS 8.2 ? maximum on resistance over temperature. Minimum distortion. VL supply for low logic level compatibility. JEDEC standard compliant for both 1.2 V and 1.8 V logic levels. Guaranteed switch off when digital inputs are floating. 24-lead, 4 mm ? 4 mm LFCSP.

The ADG2128?is an analog cross point switch with an array size of 8 ? 12. The switch array is arranged so that there are eight columns by 12 rows, for a total of 96 switch channels. The array is bidirectional, and the rows and columns can be configured as either inputs or outputs. Each of the 96 switches can be addressed and configured through the I2C compatible interface. Standard, full speed, and high speed (3.4 MHz) I2C interfaces are supported. Any simultaneous switch combination is allowed. An additional feature of the ADG2128 is that switches can be updated simultaneously, using the LDSW command. In addition, a RESET option allows all of the switch channels to be reset/off. At power-on, all switches are in the off condition. The device is packaged in a 32-lead, 5 mm ? 5 mm LFCSP_VQ.APPLICATIONS AV switching in TV Automotive infotainment AV receivers CCTV Ultrasound applications KVM switching Telecom applications Test equipment/instrumentation PBX systems

Digital Potentiometer Development Tools MAX5393 Eval Kit

Digital Potentiometer Development Tools Eval Kit/System MAX5386M, MAX5388, MAX5391, and MAX5393 (Dual 256-Tap,Volatile, Low-Voltage Linear Taper Digital Potentiometers)

Digital to Analog Converters - DAC 12-Bit Precision DAC

Digital to Analog Converters - DAC 12-Bit Precision DAC

Digital to Analog Converters - DAC 12-Bit Precision DAC

Digital to Analog Converters - DAC 12-Bit Precision DAC

Digital Potentiometer Development Tools Eval Kit/System MAX5386M, MAX5388, MAX5391, and MAX5393 (Dual 256-Tap,Volatile, Low-Voltage Linear Taper Digital Potentiometers)

Digital to Analog Converters - DAC 12-Bit Precision DAC

12 Bit Digital to Analog Converter 1 20-PLCC (8.97x8.97)

Digital Potentiometer Development Tools MAX5393 Eval Kit

Digital Potentiometer Development Tools Eval Kit/System MAX5386M, MAX5388, MAX5391, and MAX5393 (Dual 256-Tap,Volatile, Low-Voltage Linear Taper Digital Potentiometers)

Digital Potentiometer Development Tools Eval Kit/System MAX5386M, MAX5388, MAX5391, and MAX5393 (Dual 256-Tap,Volatile, Low-Voltage Linear Taper Digital Potentiometers)

Digital to Analog Converters - DAC 12-Bit Precision DAC

The AD9988 is a highly integrated device with four 16-bit, 12 GSPS maximum sample rate, RF digital-to-analog converter (DAC) cores, and four 12-bit, 4 GSPS rate, RF analog-to-digital converter (ADC) cores. The device supports four transmitter channels and four receiver channels with a 4T4R configuration. This product is well suited for four-antenna TDD transmitter applications, where the receiver path can be shared between receiver and observation modes. The GPIO pins can be configured and toggled to support different user modes, while phase coherency is maintained. The maximum radio channel bandwidth supported is 1.2 GHz in a 4T4R configuration and a sample resolution of 16 bits. The AD9988 features a 16-lane 24.75 Gbps JESD204C or 15.5 Gbps JESD204B serial data port that allows up to eight lanes per transmit/receive link, an on-chip clock multiplier, and digital signal processing capability targeted at multiband direct to RF radio applications.APPLICATIONSWireless communications infrastructureW-CDMA, LTE, LTE-A, massive multiple input multiple output (MIMO)Point to point microwave, E-band, and 5G mmWaveBroadband communications systemsDOCSIS 3.0+ cable modem termination system (CMTS)Communication test and measurement systems

Demonstration circuit 833 is an ultralow dropout voltage supply using the 1.5A output current LTC3026 linear regulator in a small 3mm × 3mm 10-Pin DFN package. The DC833 has an input voltage range from 1.14V to 3.5V when the internal boost converter is enabled, and a maximum input voltage of 5.5V when an external source is supplied. The output voltage jumper-selectable and can be set to 0.8V, 1.2V, 1.5V, 1.5V, 1.8V or a user-defined value between 0.4V and 2.6V. The 0.4V reference of the LTC3026 allows the DC833 to supply power to very low voltage applications. The DC833 is also an excellent choice for post regulation of step-down switching regulators, creating a high efficiency low-noise supply. The DC833 comes assembled with small ceramic capacitors, showing the LTC3026's ability to maintain stability with ceramic output capacitors.

The ADRF5025 is a reflective single-pole double-throw (SPDT) switch, manufactured in silicon process.This switch operates from 9 kHz to 44 GHz with better than 1.6 dB of insertion loss and 35 dB of isolation. The ADRF5025 has an radio frequency (RF) input power handling capability of 27 dBm for both the through path and hot switching.The ADRF5025 draws a low current of 14 ?A on the positive supply of +3.3 V and 120 ?A on negative supply of ?3.3 V. The device employs complementary metal-oxide semiconductor (CMOS)-/low voltage transistor to transistor logic (LVTTL)-compatible controls.The ADRF5025 is pin compatible with the ADRF5024, low frequency cutoff version, which operates from 100 MHz to 44 GHz.The ADRF5025 RF ports are designed to match a characteristic impedance of 50 ?. For ultrawideband products, impedance matching on the RF transmission lines can further optimize high frequency insertion loss and return loss characteristics. Refer to the Electrical Specifications section, Typical Performance Characteristics section, and Applications Information section for more details.The ADRF5025 comes in a 2.25 mm ? 2.25 mm, 12-terminal, RoHS-compliant, land grid array (LGA) package and can operate from ?40?C to +105?C.Applications Industrial scanners Test and instrumentation Cellular infrastructure: 5G mmWave Military radios, radars, electronic counter measures (ECMs) Microwave radios and very small aperture terminals (VSATs)

BOARD EVAL FOR AD5665 LFCSP

The ADCMP606 and ADCMP607 are very fast comparatorsfabricated on XFCB2, an Analog Devices, Inc., proprietaryprocess. These comparators are exceptionally versatile and easyto use. Features include an input range from VEE ? 0.5 V toVCCI + 0.2 V, low noise, CML-compatible output drivers, andTTL-/CMOS-compatible latch inputs with adjustable hysteresisand/or shutdown inputs.The devices offer 1.25 ns propagation delay with 2.5 ps rmsrandom jitter (RJ). Overdrive and slew rate dispersion aretypically less than 50 ps.A flexible power supply scheme allows the devices to operatewith a single +2.5 V positive supply and a ?0.5 V to +2.7 Vinput signal range up to a +5.5 V positive supply with a ?0.5 Vto +5.7 V input signal range. The ADCMP607 features splitinput/output supplies with no sequencing restrictions tosupport a wide input signal range with independent outputswing control and power savings.The CML-compatible output stage is fully back-matched forsuperior performance. The comparator input stage offers robustprotection against large input overdrive, and the outputs do notphase reverse when the valid input signal range is exceeded. Onthe ADCMP607, latch and programmable hysteresis features arealso provided with a unique single-pin control option.The ADCMP606 is available in a 6-lead SC70 package and theADCMP607 is available in a 12-lead LFCSP package.Applications High speed instrumentation Clock and data signal restoration Logic level shifting or translation Pulse spectroscopy High speed line receivers Threshold detection Peak and zero-crossing detectors High speed trigger circuitry Pulse-width modulators Current-/voltage-controlled oscillators Automatic test equipment (ATE)