The ADF7021-N is a high performance, low power, narrow-band transceiver based on the ADF7021. The ADF7021-N has IF filter bandwidths of 9 kHz, 13.5 kHz, and 18.5 kHz, making it ideally suited to worldwide narrowband standards and particularly those that stipulate 12.5 kHz channel separation. It is designed to operate in the narrow-band, license-free ISM bands and in the licensed bands with frequency ranges of 80 MHz to 650 MHz and 842 MHz to 916 MHz. The part has both Gaussian and raised cosine transmit data filtering options to improve spectral efficiency for narrow-band applications. It is suitable for circuit applications targeted at the Japanese ARIB STD-T67, the European ETSI EN 300 220, the Korean short range device regulations, the Chinese short range device regulations, and the North American FCC Part 15, Part 90, and Part 95 regulatory standards. A complete transceiver can be built using a small number of external discrete components, making the ADF7021-N very suitable for price-sensitive and area-sensitive applications. The range of on-chip FSK modulation and data filtering options allows users greater flexibility in their choice of modulation schemes while meeting the tight spectral efficiency requirements. The ADF7021-N also supports protocols that dynamically switch among 2FSK, 3FSK, and 4FSK to maximize communica-tion range and data throughput. The transmit section contains two voltage controlled oscillators (VCOs) and a low noise fractional-N PLL with an output resolution of The frequency-agile PLL allows the ADF7021-N to be used in frequency-hopping, spread spectrum (FHSS) systems. Both VCOs operate at twice the fundamental frequency to reduce spurious emissions and frequency pulling problems. The transmitter output power is programmable in 63 steps from ?16 dBm to +13 dBm and has an automatic power ramp control to prevent spectral splatter and help meet regulatory standards. The transceiver RF frequency, channel spacing, and modulation are programmable using a simple 3-wire interface. The device operates with a power supply range of 2.3 V to 3.6 V and can be powered down when not in use. A low IF architecture is used in the receiver (100 kHz), which minimizes power consumption and the external component count yet avoids dc offset and flicker noise at low frequencies. The IF filter has programmable bandwidths of 9 kHz, 13.5 kHz, and 18.5 kHz. The ADF7021-N supports a wide variety of pro-grammable features including Rx linearity, sensitivity, and IF bandwidth, allowing the user to trade off receiver sensitivity and selectivity against current consumption, depending on the application. The receiver also features a patent-pending automatic frequency control (AFC) loop with programmable pull-in range that allows the PLL to track out the frequency error in the incoming signal. The receiver achieves an image rejection performance of 56 dB using a patent-pending IR calibration scheme that does not require the use of an external RF source. An on-chip ADC provides readback of the integrated tempera-ture sensor, external analog input, battery voltage, and RSSI signal, which provides savings on an ADC in some applications. The temperature sensor is accurate to ?10?C over the full oper-ating temperature range of ?40?C to +85?C. This accuracy can be improved by performing a 1-point calibration at room temperature and storing the result in memory.

The ADF7021-V is a high performance, low power, narrow-band RF transceiver based on the ADF7021-N. The architecture of the ADF7021-V transceiver is similar to that of the ADF7021-N except that an external VCO is used by the on-chip RF synthesizer for applications that require improved phase noise performance.The ADF7021-V is designed to operate in both the license-free ISM bands and in the licensed bands from 80 MHz to 960 MHz.To minimize RF feedthrough and spurious emissions, the external VCO operates at 2? or 4? the desired RF frequency; the ADF7021-V supports a maximum VCO frequency operation of 1920 MHz. The 4? VCO operation is programmable by enabling an additional on-chip divide-by-2 outside the RF synthesizer loop and offers improved phase noise performance.As with the ADF7021-N receiver, the IF filter bandwidths of 9 kHz, 13.5 kHz, and 18.5 kHz are supported, making the ADF7021-V ideally suited to worldwide narrow-band telemetry applications.The part has both Gaussian and raised cosine transmit data filtering options to improve spectral efficiency for narrow-band applications. It is suitable for circuit applications targeted at the following: European ETSI EN 300 220 North American FCC Part 15, Part 90, and Part 95 Japanese ARIB STD-T67 Korean short-range device regulations Chinese short-range device regulationsA complete transceiver can be built using a small number of discrete external components, making the ADF7021-V very suitable for area-sensitive, high performance driven applications.See data sheet for more information.APPLICATIONS Narrow-band, short range device (SRD) standards ETSI EN 300 220 FCC Part 90 (meets Emission Mask D requirements) FCC Part 95 ARIB STD-T67 Wireless Metering Narrow-band wireless telemetry

The ADF7023 is a very low power, high performance, highly integrated 2FSK/GFSK/OOK/MSK/GMSK transceiver designed for operation in the 862 MHz to 928 MHz and 431 MHz to 464 MHz frequency bands, which cover the worldwide license-free ISM bands at 433 MHz, 868 MHz, and 915 MHz. It is suitable for circuit applications that operate under the European ETSI EN300-220, the North American FCC (Part 15), the Chinese short-range wireless regulatory standards, or other similar regional standards. Data rates from 1 kbps to 300 kbps are supported.The transmit RF synthesizer contains a VCO and a low noise fractional-N PLL with an output channel frequency resolution of 400 Hz. The VCO operates at 2? or 4?, the fundamental frequency to reduce spurious emissions. The receive and transmit synthesizer bandwidths are automatically, and independently, configured to achieve optimum phase noise, modulation quality, and settling time. The transmitter output power is programmable from ?20 dBm to +13.5 dBm, with automatic PA ramping to meet transient spurious specifications. The part possesses both single-ended and differential PAs, which allows for Tx antenna diversity.The receiver is exceptionally linear, achieving an IP3 specification of ?12.2 dBm and ?11.5 dBm at maximum gain and minimum gain, respectively, and an IP2 specification of 18.5 dBm and 27 dBm at maximum gain and minimum gain, respectively. The receiver achieves an interference blocking specification of 66 dB at ?2 MHz offset and 74 dB at ?10 MHz offset. Thus, the part is extremely resilient to the presence of interferers in spectrally noisy environments. The receiver features a novel, high speed, automatic frequency control (AFC) loop, allowing the PLL to find and correct any RF frequency errors in the recovered packet.A patent pending, image rejection calibration scheme is available through a program download. The algorithm does not require the use of an external RF source nor does it require any user intervention once initiated. The results of the calibration can be stored in nonvolatile memory for use on subsequent power-ups of the transceiver.See data sheet for additional information.Applications Smart metering IEEE 802.15.4g Wireless MBUS Home automation Process and building control Wireless sensor networks (WSNs) Wireless healthcare

The ADF7023 is a very low power, high performance, highly integrated 2FSK/GFSK/OOK/MSK/GMSK transceiver designed for operation in the 862 MHz to 928 MHz and 431 MHz to 464 MHz frequency bands, which cover the worldwide license-free ISM bands at 433 MHz, 868 MHz, and 915 MHz. It is suitable for circuit applications that operate under the European ETSI EN300-220, the North American FCC (Part 15), the Chinese short-range wireless regulatory standards, or other similar regional standards. Data rates from 1 kbps to 300 kbps are supported.The transmit RF synthesizer contains a VCO and a low noise fractional-N PLL with an output channel frequency resolution of 400 Hz. The VCO operates at 2? or 4?, the fundamental frequency to reduce spurious emissions. The receive and transmit synthesizer bandwidths are automatically, and independently, configured to achieve optimum phase noise, modulation quality, and settling time. The transmitter output power is programmable from ?20 dBm to +13.5 dBm, with automatic PA ramping to meet transient spurious specifications. The part possesses both single-ended and differential PAs, which allows for Tx antenna diversity.The receiver is exceptionally linear, achieving an IP3 specification of ?12.2 dBm and ?11.5 dBm at maximum gain and minimum gain, respectively, and an IP2 specification of 18.5 dBm and 27 dBm at maximum gain and minimum gain, respectively. The receiver achieves an interference blocking specification of 66 dB at ?2 MHz offset and 74 dB at ?10 MHz offset. Thus, the part is extremely resilient to the presence of interferers in spectrally noisy environments. The receiver features a novel, high speed, automatic frequency control (AFC) loop, allowing the PLL to find and correct any RF frequency errors in the recovered packet.A patent pending, image rejection calibration scheme is available through a program download. The algorithm does not require the use of an external RF source nor does it require any user intervention once initiated. The results of the calibration can be stored in nonvolatile memory for use on subsequent power-ups of the transceiver.See data sheet for additional information.Applications Smart metering IEEE 802.15.4g Wireless MBUS Home automation Process and building control Wireless sensor networks (WSNs) Wireless healthcare

The ADF7023 is a very low power, high performance, highly integrated 2FSK/GFSK/OOK/MSK/GMSK transceiver designed for operation in the 862 MHz to 928 MHz and 431 MHz to 464 MHz frequency bands, which cover the worldwide license-free ISM bands at 433 MHz, 868 MHz, and 915 MHz. It is suitable for circuit applications that operate under the European ETSI EN300-220, the North American FCC (Part 15), the Chinese short-range wireless regulatory standards, or other similar regional standards. Data rates from 1 kbps to 300 kbps are supported.The transmit RF synthesizer contains a VCO and a low noise fractional-N PLL with an output channel frequency resolution of 400 Hz. The VCO operates at 2? or 4?, the fundamental frequency to reduce spurious emissions. The receive and transmit synthesizer bandwidths are automatically, and independently, configured to achieve optimum phase noise, modulation quality, and settling time. The transmitter output power is programmable from ?20 dBm to +13.5 dBm, with automatic PA ramping to meet transient spurious specifications. The part possesses both single-ended and differential PAs, which allows for Tx antenna diversity.The receiver is exceptionally linear, achieving an IP3 specification of ?12.2 dBm and ?11.5 dBm at maximum gain and minimum gain, respectively, and an IP2 specification of 18.5 dBm and 27 dBm at maximum gain and minimum gain, respectively. The receiver achieves an interference blocking specification of 66 dB at ?2 MHz offset and 74 dB at ?10 MHz offset. Thus, the part is extremely resilient to the presence of interferers in spectrally noisy environments. The receiver features a novel, high speed, automatic frequency control (AFC) loop, allowing the PLL to find and correct any RF frequency errors in the recovered packet.A patent pending, image rejection calibration scheme is available through a program download. The algorithm does not require the use of an external RF source nor does it require any user intervention once initiated. The results of the calibration can be stored in nonvolatile memory for use on subsequent power-ups of the transceiver.See data sheet for additional information.Applications Smart metering IEEE 802.15.4g Wireless MBUS Home automation Process and building control Wireless sensor networks (WSNs) Wireless healthcare

The ADG4612 & ADG4613?contain four independent single-pole/single-throw (SPST) switches. The ADG4612 switches areturned on with Logic 1 on the appropriate control input. TheADG4613 has two switches with digital control logic similar tothat of the ADG4612; the logic is inverted on the other twoswitches. Each switch conducts equally well in both directionswhen on and has an input signal range that extends to thesupplies. The ADG4613 exhibits break-before-make switchingaction for use in multiplexer applications.When no power supplies are present the switch remains in theOFF condition and the switch inputs are high impedanceinputs. This ensures that no current flows that may damage theswitch. This is very useful in application where analog signalsmay be present at the switch inputs before power or where theuser has no control over the Power Supply Sequence.In the off condition, signal levels up to 16V are blocked. Also, ifthe analog input signal levels exceed VDD by VT then the switchwill turn off.The ultralow on resistance of these switches make them idealsolutions for data acquisition and gain switching applicationswhere low on resistance and distortion is critical. The onresistance profile is very flat over the full analog input rangeensuring excellent linearity and low distortion when switchingaudio signals.APPLICATIONS Hot swap applications Data acquisition systems Battery-powered systems Automatic test equipment Communication systems Relay ReplacementPRODUCT HIGHLIGHTS Power-Off Protection On Both S and D Pins. PSS Robustness. Overvoltage Protection up to 16 V. 5.2 ? On Resistance. 16-Lead TSSOP and 3 mm ? 3 mm LFCSP Packages.

The ADG5248F and ADG5249F are 8:1 and dual 4:1 analog multiplexers. The ADG5248F switches one of eight inputs to a common output and the ADG5249F switches one of four differential inputs to a common differential output. Each channel conducts equally well in both directions when on, and each channel has an input signal range that extends to the supplies. The primary supply voltages define the on-resistance profile, whereas the secondary supply voltages define the voltage level at which the overvoltage protection engages.When no power supplies are present, the channel remains in the off condition, and the switch inputs are high impedance. Under normal operating conditions, if the analog input signal levels on any Sx pin exceed positive fault voltage (POSFV) or negative fault voltage (NEGFV) by a threshold voltage (VT), the channel turns off and that Sx pin becomes high impedance. If the switch is selected to be on, then the drain pin is pulled to the secondary supply voltage that was exceeded. Input signal levels up to +55 V or ?55 V relative to ground are blocked, in both the powered and unpowered condition.The low capacitance and charge injection of these switches make them ideal solutions for data acquisition and sample-and-hold applications, where low glitch switching and fast settling times are required.?Note that, throughout this data sheet, multifunction pins, such as A0/F2, are referred to either by the entire pin name or by a single function of the pin, for example, A0, when only that function is relevant.?Product Highlights Source pins are protected against voltages greater than the secondary supply rails, up to ?55 V and +55 V. Source pins are protected against voltages between ?55 V and +55 V in an unpowered state. Overvoltage detection with digital output indicates operating state of switches. Trench isolation guards against latch-up. Optimized for low charge injection and on-capacitance. The ADG5248F/ADG5249F can be operated from a dual?supply of ?5 V to ?22 V or a single power supply of 8 V to 44 V.Applications Analog input/output modules Process control/distributed control systems Data acquisition Instrumentation Avionics Automatic test equipment Communication systems Relay replacement

The ADG5412F and ADG5413F contain four independently controlled single-pole/single-throw (SPST) switches. The ADG5412F has four switches that turn on with Logic 1 inputs. The ADG5413F has two switches with that turn on and two switches that turn off with Logic 1 inputs. Each switch conducts equally well in both directions when on, and each switch has an input signal range that extends to the supplies. The digital inputs are compatible with 3 V logic inputs over the full operating supply range.When no power supplies are present, the switch remains in the off condition, and the switch inputs are high impedance. Under normal operating conditions, if the analog input signal levels on any Sx pin exceed VDD or VSS by a threshold voltage, VT, then the switch turns off. Input signal levels up to +55 V or ?55 V relative to ground are blocked, in both the powered and unpowered condition.The low on resistance of these switches, combined with on-resistance flatness over a significant portion of the signal range make them an ideal solution for data acquisition and gain switching applications where excellent linearity and low distortion are critical.Product Highlights Source pins are protected against voltages greater than the supply rails, up to ?55 V and +55 V. Source pins are protected against voltages between ?55 V and +55 V, in an unpowered state. Overvoltage detection with digital output indicates operating state of switches. Trench isolation guards against latch-up. Optimized for low on resistance and on-resistance flatness. The ADG5412F/ADG5413F can be operated from a dual?supply of ?5 V up to ?22 V or a single power supply of 8 V up to 44 V.Applications Analog input/output modules Process control/distributed control systems Data acquisition Instrumentation Avionics Automatic test equipment Communication systems Relay replacement

The ADG5436 is a monolithic CMOS device containing twoindependently selectable single-pole/double-throw (SPDT)switches. An EN input on the LFCSP package enables or disablesthe device. When disabled, all channels switch off. Each switch conducts equally well in both directions when on and has aninput signal range that extends to the supplies. In the off condition,signal levels up to the supplies are blocked. Both switches exhibitbreak-before-make switching action for use in multiplexerapplications.The on-resistance profile is very flat over the full analog input range, ensuring excellent linearity and low distortion when switching audio signals.Product Highlights Trench isolation guards against latch-up. A dielectric trench separates the P and N channel transistors thereby preventing latch-up even under severe overvoltage conditions. Low RON. Dual-supply operation. For applications where the analog signal is bipolar, the ADG5436 can be operated from dual supplies up to ?22 V. Single-supply operation. For applications where the analog signal is unipolar, the ADG5436 can be operated from a single-rail power supply up to 40 V. 3 V logic compatible digital inputs: VINH = 2.0 V, VINL = 0.8 V. No VL logic power supply required.Applications Relay replacement Automatic test equipment Data acquisition Instrumentation Avionics Audio and video switching Communication systems

The ADG918/ADG919 are wideband switches using a CMOSprocess to provide high isolation and low insertion loss to1 GHz. The ADG918 is an absorptive (matched) switch having50 ? terminated shunt legs, whereas the ADG919 is a reflectiveswitch. These devices are designed such that the isolation ishigh over the dc to 1 GHz frequency range. They have on-boardCMOS control logic, thus eliminating the need for externalcontrolling circuitry. The control inputs are both CMOS andLVTTL compatible. The low power consumption of theseCMOS devices makes them ideally suited to wireless andgeneral-purpose high frequency switching applications.Product Highlights ?43 dB off isolation at 1 GHz. 0.8 dB insertion loss at 1 GHz. Tiny 8-lead MSOP/LFCSP.Applications Wireless communications General-purpose RF switching Dual-band applications High speed filter selection Digital transceiver front end switch IF switching Tuner modules Antenna diversity switching

The ADGM1304 is a wideband, single-pole, four-throw (SP4T) switch, fabricated using Analog Devices, Inc., microelectro-mechanical system (MEMS) switch technology. This technology enables a small form factor, wide RF bandwidth, highly linear, low insertion loss switch that is operational from 0 Hz/dc to 14 GHz, making the ADGM1304 an ideal solution for a wide range of RF and precision equipment switching needs.An integrated driver chip generates a high voltage to electrostatically actuate a switch that can be controlled by a parallel interface and a serial peripheral interface (SPI). All four switches are independently controllable.The device is packaged in a 24-lead, 5 mm ? 4 mm ? 0.95 mm, lead frame chip-scale package (LFCSP).To ensure optimum operation of the ADGM1304, the Critical Operational Requirements section must be followed exactly.The on resistance (RON) performance of the ADGM1304 is affected by device to device variation, channel to channel variation, cycle actuations, settling time post turn on, bias voltage, and temperature changes.APPLICATIONS Relay replacements Automatic test equipment: RF/high speed digital and mixed signals Load and probe boards: RF/high speed digital and mixed signals RF test instrumentation Reconfigurable filters and attenuators High performance RF switching

The ADGS1212 contains four independent single-pole/single-throw(SPST) switches. A serial peripheral interface (SPI)controls the switches. The SPI interface has robust error detectionfeatures such as cyclic redundancy check (CRC) error detection,invalid read/write address detection, and SCLK count errordetection.It is possible to daisy-chain multiple ADGS1212 devices together.Daisy-chain mode enables the configuration of multiple deviceswith minimal digital lines. The ADGS1212 can also operate inburst mode to decrease the time between SPI commands.iCMOS construction ensures ultralow power dissipation, makingthe device ideal for portable and battery-powered instruments.Each switch conducts equally well in both directions when on,and each switch has an input signal range that extends to thesupplies.In the off condition, signal levels up to the supplies are blocked.The ultralow capacitance and charge injection of these switchesmake them ideal solutions for data acquisition and sample-andholdapplications where low glitch and fast settling are required.Fast switching speed coupled with high signal bandwidth makethe device suitable for video signal switching.Multifunction pin names may be referenced by their relevantfunction only.Product Highlights SPI interface removes the need for parallel conversion, logic traces, and reduces the general-purpose input/output (GPIO) channel count. Daisy-chain mode removes additional logic traces when multiple devices are used. CRC error detection, invalid read/write address detection, and SCLK count error detection ensure a robust digital interface. CRC and error detection capabilities allow the ADGS1212 to be used in safety critical systems. Guaranteed break-before-make switching allows the the ADGS1212 to be used in multiplexer configurations with external wiring. The ADGS1212 1.8 V logic compatibility with 2.7 V ? VL ? 3.3 V Ultralow capacitance.

The ADGS1408 /?ADGS1409 are analog multiplexers comprisingeight single channels and four differential channels, respectively.A serial peripheral interface (SPI) controls the switches. The SPIinterface has robust error detection features such as cyclicredundancy check (CRC) error detection, invalid read/writeaddress detection, and SCLK count error detection.It is possible to daisy-chain multiple ADGS1408 / ADGS1409devices together. Daisy-chain mode enables the configuration ofmultiple devices with a minimal amount of digital lines. TheADGS1408 / ADGS1409 can also operate in burst mode todecrease the time between SPI commands.iCMOS construction ensures ultra low power dissipation, makingthe devices ideally suited for portable and battery-poweredinstruments.Each switch conducts equally well in both directions when on,and each switch has an input signal range that extends to thesupplies. In the off condition, signal levels up to the suppliesare blocked.The on-resistance profile is flat over the full analog input range,which ensures linearity and low distortion when switchingaudio signals.PRODUCT HIGHLIGHTS SPI interface removes the need for parallel conversion, logic traces, and reduces GPIO channel count. Daisy-chain mode removes additional logic traces when multiple devices are used. CRC error detection, invalid read/write address detection, and SCLK count error detection ensure a robust digital interface. CRC and error detection capabilities allow the use of the ADGS1408/ADGS1409 in safety critical systems. Minimal distortion.APPLICATIONS Automated test equipment Data acquisition systems Battery-powered systems Sample-and-hold systems Audio signal routing Video signal routing Communications systems Relay replacement?

The ADGS1408?/ ADGS1409 are analog multiplexers comprisingeight single channels and four differential channels, respectively.A serial peripheral interface (SPI) controls the switches. The SPIinterface has robust error detection features such as cyclicredundancy check (CRC) error detection, invalid read/writeaddress detection, and SCLK count error detection.It is possible to daisy-chain multiple ADGS1408 / ADGS1409devices together. Daisy-chain mode enables the configuration ofmultiple devices with a minimal amount of digital lines. TheADGS1408/ADGS1409 can also operate in burst mode todecrease the time between SPI commands.iCMOS construction ensures ultra low power dissipation, makingthe devices ideally suited for portable and battery-poweredinstruments.Each switch conducts equally well in both directions when on,and each switch has an input signal range that extends to thesupplies. In the off condition, signal levels up to the suppliesare blocked.The on-resistance profile is flat over the full analog input range,which ensures linearity and low distortion when switchingaudio signals.PRODUCT HIGHLIGHTS SPI interface removes the need for parallel conversion, logic traces, and reduces GPIO channel count. Daisy-chain mode removes additional logic traces when multiple devices are used. CRC error detection, invalid read/write address detection, and SCLK count error detection ensure a robust digital interface. CRC and error detection capabilities allow the use of the ADGS1408 / ADGS1409 in safety critical systems. Minimal distortion.?APPLICATIONS Automated test equipment Data acquisition systems Battery-powered systems Sample-and-hold systems Audio signal routing Video signal routing Communications systems Relay replacement?

The ADGS5412 contains four independent single-pole/single-throw (SPST) switches. A serial peripheral interface (SPI) controls the switches. The SPI interface has robust error detection features, including cyclic redundancy check (CRC) error detection, invalidread/write address detection, and serial clock (SCLK) counterror detection.It is possible to daisy-chain multiple ADGS5412 devices together,which enables the configuration of multiple devices with aminimal amount of digital lines. The ADGS5412 can also operate in burst mode to decrease the time between SPIcommands. Each switch conducts equally well in both directions when on,and each switch has an input signal range that extends to thesupplies. In the off condition, signal levels up to the supplies are blocked. The on-resistance profile is very flat over the full analog input range, which ensures good linearity and low distortion when switching audio signals. The ADGS5412 exhibits break-before-make switching action, allowing use of the device in multiplexer applications with external wiring.PRODUCT HIGHLIGHTS SPI interface removes the need for parallel conversion and logic traces and reduces general-purpose input/output (GPIO) channel count. Daisy-chain mode removes additional logic traces when multiple devices are used. CRC, invalid read/write address, and SCLK count error detection ensure a robust digital interface. CRC error detection capabilities allow for the use of the ADGS5412 in safety critical systems. Guaranteed break-before-make switching allows the use of the ADGS5412 in multiplexer configurations with external wiring.Trench isolation analog switch section guards against latch-up. A dielectric trench separates the positive (P) and negative (N) channel transistors thereby preventing latch-up even under severe overvoltage conditions.APPLICATIONS Relay replacement Automatic test equipment Data acquisition Instrumentation Avionics Audio and video switching Communication systems

The ADGS5414 contains eight independent single-pole/single-throw (SPST) switches. An SPI interface controls the switchesand has robust error detection features, including cyclicredundancy check (CRC) error detection, invalid read/writeaddress error detection, and SCLK count error detection.It is possible to daisy-chain multiple ADGS5414 devices together. This enables the configuration of multiple devices with a minimalamount of digital lines. The ADGS5414 can also operate in burstmode to decrease the time between SPI commands.Each switch conducts equally well in both directions when on, andeach switch has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked.The on-resistance profile is flat over the full analog input range, ensuring ideal linearity and low distortion when switchingaudio signals. The ADGS5414 exhibits break-before-makeswitching action, allowing the use of the device in multiplexer applications with external wiring.Product Highlights The SPI interface removes the need for parallel conversion, logic traces, and reduces the general-purpose input/output (GPIO) channel count. Daisy-chain mode removes the need for additional logic traces when using multiple devices. CRC error detection, invalid read/write address error detenction, and SCLK count error detection ensures a robust digital interface. CRC and error detection capabilities allow the use of the ADGS5414 in safety critical systems. Break-before-make switching allows external wiring of the switches to deliver multiplexer configurations. The trench isolation analog switch section guards against latch-up. A dielectric trench separates the positive and negative channel transistors, preventing latch-up even under severe overvoltage conditions.Applications Relay replacement Automatic test equipment Data acquisition Instrumentation Avionics Audio and video switching Communication systems

The ADM1062 Super Sequencer? is a configurable supervisory/sequencing device that offers a single-chip solution for supply monitoring and sequencing in multiple-supply systems. In addition to these functions, the ADM1062 integrates a 12-bit ADC and six 8-bit voltage output DACs. These circuits can be used to implement a closed-loop margining system that enables supply adjustment by altering either the feedback node or the reference of a dc-to-dc converter using the DAC outputs.For more information about the ADM1062 register map, refer to the AN-698 Application Note.?APPLICATIONS Central office systems Servers/routers Multivoltage system line cards DSP/FPGA supply sequencing In-circuit testing of margined supplies

The ADM1064 Super Sequencer? is a configurable supervisory/ sequencing device that offers a single-chip solution for supply monitoring and sequencing in multiple supply systems. In addition to these functions, the ADM1064 integrates a 12-bit ADC that can be used to accurately read back up to 12 separate voltages. The device also provides up to 10 programmable inputs for moni-toring undervoltage faults, overvoltage faults, or out-of-window faults on up to 10 supplies. In addition, 10 programmable outputs can be used as logic enables. Six of these programmable outputs can provide up to a 12 V output for driving the gate of an N-FET that can be placed in the path of a supply. ApplicationsCentral office systemsServers/routersMultivoltage system line cardsDSP/FPGA supply sequencingIn-circuit testing of margined supplies

The ADM1191 is an integrated current sense amplifier that offers digital current and voltage monitoring via an on-chip, 12-bit analog-to-digital converter (ADC), communicated through an I2C interface. An internal current sense amplifier senses voltage across the sense resistor in the power path via the VCC pin and the SENSE pin.A 12-bit ADC can measure the current seen in the sense resistor, as well as the supply voltage on the VCC pin.An industry-standard I2C interface allows a controller to read current and voltage data from the ADC. Measurements can be initiated by an I2C command or via the convert (CONV) pin. The CONV pin is especially useful for synchronizing reads on multiple ADM1191 devices. Alternatively, the ADC can run continuously, and the user can read the latest conversion data whenever it is required. Up to 16 unique I2C addresses can be created, depending on the way the A0 pin and the A1 pin are connected.A SETV pin is also included. A voltage applied to this pin is internally compared to the output voltage on the current sense amplifier. The output of the SETV comparator asserts when the current sense amplifier output exceeds the SETV voltage. When this event occurs, the ALERTB output asserts.The ALERTB output can be used as a flag to warn a micro-controller or field programmable gate array (FPGA) of an overcurrent condition. ALERTB outputs of multiple ADM1191 devices can be tied together and used as a combined alert.The ADM1191 is packaged in a 10-lead MSOP.APPLICATIONS Power monitoring/power budgeting Central office equipment Telecommunication and data communication equipment PCs/servers

The ADM1272 ?is a hot swap controller that allows a circuit board to be removed from or inserted into a live backplane. It also features current, voltage, and power readback via an integrated 12-bit analog-to-digital converter (ADC), accessed using a PMBus? interface. This device is able to withstand up to 120 V, which makes it very robust in surviving surges and transients commonly associated with high voltage systems, usually clamped using protection devices such as transient voltage suppressors (TVSs) that can often exceed 100 V.The load current, ILOAD, is measured using an internal current sense amplifier that measures the voltage across a sense resistor in the power path via the SENSE+ and SENSE? pins. A default current limit sense voltage of 30 mV is set, but this limit can be?adjusted down, if required, using a resistor divider network from the VCAP regulator output voltage to the ISET pin. An additional resistor can also be placed from ISET to VIN (or VOUT) to allow the current limit to track inversely with the rail voltage. This resistor allows an approximate system power limit to be used.The ADM1272 ?limits the current through the sense resistor by controlling the gate voltage of an external N channel field effect transistor (FET) in the power path. The sense voltage, and therefore the load current, is maintained below the preset maximum. The ADM1272 ?protects the external FET by monitoring and limiting the energy transfer through the FET while the current is being controlled. This energy limit is set by the choice of components connected to the EFAULT pin (for fault protection mode) and the ESTART pin during startup. Therefore, different energy limits can be set for start-up and normal fault conditions. During startup, inrush currents are maintained very low and different areas of the safe operating area (SOA) curve are of interest, whereas during fault conditions, the currents can be much higher.The controller uses the drain to source voltage (VDS) across the FET to set the current profile of the EFAULT and ESTART pins and, therefore, the amount of much energy allowed to be transferred in the FET. This energy limit ensures the MOSFET remains within the SOA limits. Optionally, use a capacitor on the DVDT pin to set the output voltage ramp rate, if required. In case of a short-circuit event, a fast internal overcurrent detector responds in hundreds of ns and signals the gate to shut down. A 1.5 A pull-down device ensures a fast FET response. The gate then recovers control within 50 ?s to ensure minimal disruption during conditions, such as line steps and surges. The?ADM1272 ?features overvoltage (OV) and undervoltage (UV) protection, programmed using external resistor dividers on the UVH, UVL, and OV pins. The use of two pins for undervoltage allows independent accurate rising and falling thresholds. The PWRGD output pin signals when the output voltage is valid and the gate is sufficiently enhanced. The validity of VOUT is determined using the PWGIN pin.The 12-bit ADC measures the voltage across the sense resistor, the supply voltage on the SENSE+ pin, the output voltage, and the temperature using an external NPN/PNP device. A PMBus interface allows a controller to read data from the ADC. As many as 16 unique I2C addresses can be selected, depending on how the two ADRx pins are connected. The?ADM1272 is available in a custom 48-lead LFCSP (7 mm ? 8 mm) with a pinstrap mode that allows the device to be configured for automatic retry or latchoff when an overcurrent (OC) fault occurs.Applications 48 V/54 V systems Servers Power monitoring and control/power budgeting Central office equipment Telecommunication and data communication equipment Industrial applications