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This reference design presents a complete power solution and low-cost: discrete sequencing circuit for the OMAP-L132: OMAP-L137: and OMAP-L138 processors.

Today's digital signal processor (DSP) architectures are confronted with the tough requirement of addressing a wide-range of standards and meeting a cost-effective performance/power trade-off. Increasing raw million instructions per second (MIPS) performance just by running at a higher frequency is not possible anymore since leakage is becoming a dominant factor with shrinking silicon geometries.

This application report illustrates a design of a single chip speech codec (ADC and DAC) using the MSP430F133 MCU from Texas Instruments. The ADC part of this codec uses the on chip 12-bit ADC. The DA

The AD9520-5 provides a multioutput clock distributionfunction with subpicosecond jitter performance, along withan on-chip PLL that can be used with an external VCO.The AD9520-5 serial interface supports both SPI and I2C ports.An in-package EEPROM, which can be programmed through theserial interface, can store user-defined register settings forpower-up and chip reset.The AD9520-5 features 12 LVPECL outputs in four groups. Anyof the 1.6 GHz LVPECL outputs can be reconfigured as two250 MHz CMOS outputs. If an application requires LVDSdrivers instead of LVPECL drivers, refer to the AD9522-5.Each group of three outputs has a divider that allows both thedivide ratio (from 1 to 32) and the phase offset or coarse timedelay to be set.The AD9520-5 is available in a 64-lead LFCSP and can be operatedfrom a single 3.3 V supply. The external VCO can have anoperating voltage of up to 5.5 V. A separate output driver powersupply can be from 2.375 V to 3.465 V.The AD9520-5 is specified for operation over the standardindustrial range of ?40?C to +85?C. Applications Low jitter, low phase noise clock distribution Clock generation and translation for SONET, 10Ge, 10GFC, Synchronous Ethernet, OTU2/3/4 Forward error correction (G.710) Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs High performance wireless transceivers ATE and high performance instrumentation Broadband infrastructures

The LTM8064 is a 58VIN, 6A, constant-voltage, constantcurrent (CVCC), step-down ?Module? (power module) regulator. Included in the package are the switching controller, power switches, inductor and support components. Operating over an input voltage range of 6V to 58V, the LTM8064 supports an output voltage range of 1.2V to 36V. CVCC operation allows the LTM8064 to accurately regulate its output current up to 7A when sourcing and 9.1A when sinking over the entire output range. The output current can be set by a control voltage, a single resistor or a thermistor. To set the switching frequency, simply place a resistor from the RT pin to ground. A resistor from FB to ground will set the output voltage. Only the bulk input and output filter capacitors are needed to finish the design.The LTM8064 is packaged in a thermally enhanced, compact (16mm ? 11.9mm ? 4.92mm) over-molded ball grid array (BGA) package suitable for automated assembly by standard surface mount equipment. The LTM8064 is RoHS compliant.Applications Short- Circuit Protection or Accurate Output Current?Limit High Power LED Drive Peltier Driver Motor Drive Battery/Supercap Charging and Cell Balancing

The AD7980 is a 16-bit, successive approximation, analog-to-digital converter (ADC) that operates from a single power supply, VDD. It contains a low power, high speed, 16-bit sampling ADC and a versatile serial interface port. On the CNV rising edge, it samples an analog input IN+ between 0 V to REF with respect to a ground sense IN?. The reference voltage, REF, is applied externally and can be set independent of the supply voltage, VDD. Its power scales linearly with throughput.The SPI-compatible serial interface also features the ability, using the SDI input, to daisy-chain several ADCs on a single, 3-wire bus and provides an optional busy indicator. It is compatible with 1.8 V, 2.5 V, 3 V, or 5 V logic, using the separate supply VIO.The AD7980 is housed in a 10-lead MSOP or a 10-lead QFN (LFCSP) with operation specified from ?40?C to +125?C.APPLICATIONSAutomated test equipmentData acquisition systemsMedical instrumentsMachine automation

Ceramic Quad Flatpack (CQFP)

The ADL5500 is a mean-responding power detector for use in high frequency receiver and transmitter signal chains from 100 MHz to 6 GHz. It is easy to apply, requiring only a single supply between 2.7 V and 5.5 V and a power supply decoupling capacitor. The input is internally ac-coupled and has a nominal input impedance of 50 ?. The output is a linear-responding dc voltage with a conversion gain of 6.4 V/V rms at 900 MHz. The on-chip, 1 k? series resistance at the output combined with an external shunt capacitor creates a low-pass filter response that reduces the residual ripple in the dc output voltage.The ADL5500 is intended for true power measurement of simple and complex waveforms. The device is particularly useful for measuring high crest factor (high peak-to-rms ratio) signals, such as CDMA2000, W-CDMA, and QPSK/QAM-based OFDM waveforms.The ADL5500 offers excellent temperature stability with near 0 dB measurement error across temperature. The high accuracy range, centered around +3 dBm at 900 MHz, offers ?0.1 dB error from ?40?C to +85?C over an 8.5 dB range. The ADL5500 reduces calibration requirements with low drift across a 30 dB range over temperature and process variations.The ADL5500 operates from ?40?C to +85?C and is available in a 4-ball, 1.0 mm ? 1.0 mm wafer-level chip scale package. It is fabricated on a proprietary high fT silicon bipolar process.

The TIDA-00136 reference design is a high speed serial video interface to connect a remote automotive WVGA TFT LCD display with OpenLDI (LVDS) Interface to a video processing system. It uses TIs FPD-Link II SerDes technology to transmit uncompressed video data over shielded twisted pair or Coax cable. Application examples are rear seat entertainment systems: automotive clusters: and Head Unit Display. This design incorporates the DS99R421Q1-EVK and DS90UR124-Q1 boards together to create the solution.

This reference design supports the supply for a security tracker using the TPS40200-Q1: with the opportunity of a wide input voltage range from 8V-50V. The output can handle 4.3V up to 3A due to the non-synchronous buck controller. The reference design also allows for flexible design with a simple configuration due to the device.

The ADR1399 precision shunt reference features excellent temperature stability over a wide range of voltage, temperature, and quiescent current conditions. A temperature stabilizing loop is incorporated with the active Zener on a monolithic? substrate, which nearly eliminates changes in voltage with temperature. The subsurface Zener circuit is fully specified at a quiescent current IREF of 3 mA and offers minimal noise (1.44 ?V p-p, 0.1 Hz to 10 Hz) and excellent long-term stability (7 ppm/?kHr). The ADR1399 offers a lower output dynamic impedance (0.08 ?) than the LM399, reducing the effects of shunt resistor (RSHUNT) and the supply voltage variation on the reference output.Ideal applications for the ADR1399 include ultrastable digital voltmeters, precision calibration equipment, and ultrarepeatable analog-to-digital converters (ADCs). The simplicity of the basic pin configurations is shown in Figure 1. The 8-terminal LCC version offers force and sense pins for lower dynamic impedance and for Kelvin sensing. Table 1. Related Products Model Output Voltage (V) Initial Accuracy Range (mV) ADR1399 7.05 ?300 to +250 LTZ1000 7.2 ?200 to +300 LM399 6.95 ?200 to +350 LT1236 5 and 10 ?2.5 to +2.5 APPLICATIONS Precision voltage reference for multimeters Calibration equipment voltage standards Laboratory measurement equipment Industrial monitor and control instrumentation Ultrastable data convertors

The PMP8697 reference design uses the UCC28610 quasi-resonant flyback controller to generate two non-isolated outputs (12V@1.89A: 15V@0.2A) and one isolated output (15V@0.39A).

UCC28950, UCC29002, UCC39002 Pre-biased Output Voltage Startup Operation of the UCC28950