Search results
FIFO Memories: Solutions To Reduce FIFO Metastability (Rev. A)
Texas Instruments
FIFO Memories: Solutions To Reduce FIFO Metastability (Rev. A)
Texas Instruments
A metastable event occurs when the output of a logic device is neither a logic high nor a logic low level during a time period. Using a FIFO to synchronize digital signals operating at different frequencies may cause a metastable event to occur. This document assists designers in understanding and improving upon the metastable characteristics of the SN74ACT722xx family of synchronous style devices
MSP430x5xx Overview Comparison to MSP430x2xx and MSP430x4xx
Texas Instruments
MSP430x5xx Overview Comparison to MSP430x2xx and MSP430x4xx
Texas Instruments
The MSP430x5xx series of devices is the latest addition to the MSP430 family of microcontrollers. Although there are many common features between the MSP430x5xx and MSP430x2xx/MSP430x4xx offerings, th
A Real Time Speech Subband Coder Using the TMS32010 ( Contains Scanned Text)
Texas Instruments
A Real Time Speech Subband Coder Using the TMS32010 ( Contains Scanned Text)
Texas Instruments
This report describes a potential candidate for the 16-kbit/s transcoder which is the subband coder. A reprinted article on the subject is included which describes the theory TMS320120 implementation requirements and performance for the 16-kbit/s subband coder. The complete code for the coder is available for licensing from Atlanta Signal Processors Inc. (ASPI). Interested readers should conta
Understanding Serial LVDS Capture in High-Speed ADCs
Texas Instruments
Understanding Serial LVDS Capture in High-Speed ADCs
Texas Instruments
This application note describes various schemes of interfacing serialized low-voltage differential signaling (LVDS) data outputs from high-speed analog-to-digital converters (ADCs) to a field-programmable gate arrays (FPGAs) or other application-specific integrated circuit (ASIC)-based receivers. This note provides an introduction to standard one-wire interfaces and other interface variants (such
DLP Series-600 DMD Mechanical, Thermal, and System Mounting Concepts Application
Texas Instruments
DLP Series-600 DMD Mechanical, Thermal, and System Mounting Concepts Application
Texas Instruments
DLP Series-600 DMD DLP Series-600 DMD Mechanical, Thermal, and Systems Mounting Concepts Application Report
Using TPS54672 in DDR Memory/Active Bus Termination Applications
Texas Instruments
Using TPS54672 in DDR Memory/Active Bus Termination Applications
Texas Instruments
Integrated FET SWIFT TPS54672 regulators from Texas Instruments are a simple and low-cost solution for DDR memory bus and other high-speed logic bus termination voltage (VTT) applications. These applications are typically high-performance designs requiring fast transient response the ability to track an external voltage reference and current source and sink capability. By operating the TPS5
TVP5150AM1 Powerdown Mode
Texas Instruments
TVP5150AM1 Powerdown Mode
Texas Instruments
Mobile applications such as cell phones and PDAs have low power consumption as a key requirement. The TVP5150AM1 offers very low power consumption in normal operation. When the TVP5150AM1 is not in use the power consumption must also be very low. This application report outlines how to correctly implement the powerdown mode to ensure the lowest power consumption.