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P1601
Adapteva, Inc.
E16G301, XC7Z010 Parallella Desktop series ARM® Cortex®-A9, Epiphany III MPU Embedded Evaluation Board
| Distributor | SKU | Stock | MOQ | 1 | 10 | 50 | 100 | 1,000 | 10,000 | |
|---|---|---|---|---|---|---|---|---|---|---|
| DigiKey | 1554-1001-ND | 476 | 1 | $149.00 | $149.00 | $149.00 | $149.00 | $149.00 | $149.00 | Buy |
E16G301
Adapteva, Inc.
Epiphany-III 16-core 65nm Microprocessor The E16G301 is 16-core microprocessor/coprocessor reference design based on the 3rd generation of the Epiphany multicore architecture. The Epiphany architecture defines a multicore, scalable, shared memory, parallel computing fabric and consists of a 2D array of compute nodes connected by a low-latency mesh network-on-chip.
| Distributor | SKU | Stock | MOQ | 1 | 10 | 50 | 100 | 1,000 | 10,000 | |
|---|---|---|---|---|---|---|---|---|---|---|
| DigiKey | 1554-1000-ND | 0 | $119.00 | $119.00 | $119.00 | $119.00 | $119.00 | $119.00 | Buy |
XC7Z010
Adapteva, Inc.
E16G301, XC7Z010 Parallella Microserver Parallella-16 ARM® Cortex®-A9, Epiphany III MPU Embedded Evaluation Board
| Distributor | SKU | Stock | MOQ | 1 | 10 | 50 | 100 | 1,000 | 10,000 | |
|---|---|---|---|---|---|---|---|---|---|---|
| DigiKey | 1554-1000-ND | 0 | 1 | $126.62 | $126.62 | $126.62 | $126.62 | $126.62 | $126.62 | Buy |
ESDK
Adapteva, Inc.
Epiphany SDK : The Epiphany Software Development Kit (ESDK) is a state-of-the art software development environment targeting the Epiphany multicore architecture. The ESDK is based on standard development tools including:Optimized ANSI-C compiler (GCC4.7)Robust multicore Eclipse IDEMulticore debugger (GDB7.3)Multicore communication and hardware utility librariesFast functional simulator with instruction trace capability
E64G401
Adapteva, Inc.
Epiphany-IV 64-core 28nm Microprocessor The Epiphany-IV_400x400E64G401 is 64-core microprocessor/coprocessor reference design based on the 4th generation of the Epiphany multicore architecture that was designed as a direct replacement of the E16G301. The Epiphany architecture defines a multicore, scalable, shared memory, parallel computing fabric and consists of a 2D array of compute nodes connected by a low-latency mesh network-on-chip.