AD890 - Precision, Wideband Channel Processing Element

Dual 8-Bit, 60 MSPS A/D Converter Features: Dual 8-Bit ADCs on a Single Chip Low Power: 400 mW Typical On-Chip 2.5 V Reference and Track-and-Hold 1 VP-P Analog Input Range Single 5 V Supply Operation 5 V or 3 V Logic Interface 120 MHz Analog Bandwidth Power-Down Mode: <12 mW

Quad, 16-Bit, 2.8 GSPS, TxDAC+ Digital-to-Analog Converter Features: Supports input data rate >1 GSPS Proprietary low spurious and distortion design 6-carrier GSM IMD = 77 dBc at 75 MHz IF SFDR = 82 dBc at dc IF, −9 dBFS Flexible 8-lane JESD204B interface Support quad or dual DAC mode at 2.8 GSPS Multiple chip synchronization Fixed latency Data generator latency compensation Selectable 1×, 2×, 4×, 8× interpolation filter Low power architecture Input signal power detection Emergency stop for downstream analog circuitry protection Transmit enable function allows extra power saving High performance, low noise phase-locked loop (PLL) clock multiplier Digital inverse sinc filter Low power: 1.6 W at 1.6 GSPS, 1.7 W at 2.0 GSPS, full operating conditions 88-lead LFCSP with exposed pad

10-Bit, 40/65/80/105 MSPS 3 V Dual A/D Converter Features: Dual 10-bit, 40 MSPS, 65 MSPS, 80 MSPS, and 105 MSPS ADC Low power: 275 mW at 105 MSPS per channel On-chip reference and track-and-hold 300 MHz analog bandwidth each channel SNR = 57 dB @ 41 MHz, Encode = 80 MSPS 1 V p-p or 2 V p-p analog input range each channel 3.0 V single-supply operation (2.7 V to 3.6 V) Power-down mode for single-channel operation Twos complement or offset binary output mode Output data alignment mode Pin compatible with the 8-bit AD9288 –75 dBc crosstalk between channels AD9218-EP Supports Defense and Aerospace Applications (AQEC standard) Download AD9218-EP data sheet (pdf) Extended industrial temperature range: −55°C to +105°C Controlled manufacturing baseline 1 assembly/test site 1 fabrication site Product change notification Qualification data available on requestV62/19610-01XE DSCC Drawing Number

Precision 12-Bit CMOS Multiplying IOUT DAC, 4-Bit Bus Features: Resolution: 12 Bits Nonlinearity: ±1/2 LSB Tmin to Tmax Low Gain Drift: 2ppm/°C typ, 5ppm/°C max Microprocessor Compatible Full 4-Quadrant Multiplication Fast Interface Timing Low Power Dissipation: 40 mW max Low Cost Small Size: 16-pin DIP and 20-Terminal Surface Mount Package Latch Free (Protection Schottky Not Required)

CMOS 12-Bit Buffered Multiplying DAC With Onboard Data Latches Features: 12-Bit Resolution Low Gain TC: 2ppm/°C typ Fast TTL Compatible Data Latches Small 20-Lead 0.3" DIP and 20-Terminal Surface Mount Packages Single +5 V to +15 V Supply Latch Free (Schottky Protection Diode not Required) Low Cost Ideal for Battery Operated Equipment

CMOS 12-Bit Buffered Multiplying DAC With Onboard Data Latches Features: 12-Bit Resolution Low Gain TC: 2ppm/°C typ Fast TTL Compatible Data Latches Small 20-Lead 0.3" DIP and 20-Terminal Surface Mount Packages Single +5 V to +15 V Supply Latch Free (Schottky Protection Diode not Required) Low Cost Ideal for Battery Operated Equipment

LC2MOS Complete, High Speed 12-Bit ADC Features:12-Bit Resolution and AccuracyFast Conversion Time- AD7572XX06: 5 µs- AD7572XX12: 12.5 µsComplete with On-Chip ReferenceFast Bus Access Time: 90 nsLow Power: 135 mWSmall, 0.3', 24-Pin Package and28-Terminal Surface Mount Packages

8-Bit Analog-to-Digital Converter Features: 8-Bit Resolution No Missed Codes over Full Temperature Range Fast Conversion Time: 15 µs Interfaces to µP like RAM, ROM of Slow - Memory Low Power Dissipation: 30 mW Ratiometric Capability Single +5V Supply Low Cost Internal Comparator and Clock Oscillator

18-Bit, 1.25 MSPS PulSAR A/D Converter Features: Throughput: 1.25 MSPS INL: ±2 LSB typical, ±3 LSB max; ±8 ppm of full scale 18-bit resolution with no missing codes Dynamic range: 95.5 dB SINAD: 93.5 dB typical @ 20 kHz (VREF = 2.5 V) THD: −112 dB typical @ 20 kHz (VREF = 2.5 V) No pipeline delay (SAR architecture) Pb-free, 48-lead LQFP and 48-lead LFCSP Pin compatible with the AD7641 and other PulSAR ADCs 2.048 V internal reference: typical drift 10 ppm/°C; TEMP output Differential input range: ±VREF (VREF up to 2.5 V) Parallel (18-, 16-, or 8-bit bus) and serial 5 V/3.3 V/2.5 V interface SPI®/QSPI™/MICROWIRE™/DSP compatible Single 2.5 V supply operation Power dissipation 65 mW typical @ 1.25 MSPS with internal REF 2 W in power-down mode

16-Bit, 100 kSPS PulSAR Unipolar ADC with Ref Features: 2.5 V Internal Reference:  Typical Drift 3 ppm/°C - Guaranteed Max Drift: 15 ppm/°C Throughput: 100 kSPS INL: ±2.5 LSB Max (±0.0038% of Full Scale) 16 Bits Resolution with No Missing Codes S/(N+D): 88 dB max @ 20 kHz; THD: -96 dB max @ 20 kHz Analog Input Voltage Range: 0 V to 2.5 V No Pipeline Delay Parallel and Serial 5 V/3 V Interface SPI®/QSPI™/MICROWIRE™/DSP Compatible Single 5 V Supply Operation Package: 48-Lead Quad Flat Pack (LQFP) 48-Lead Chip Scale Package (LFCSP) Pin-to-Pin Compatible with  PulSAR® ADCs See datasheet for additional features

18-Bit, 570 kSPS PulSAR A/D Converter Features: 18-bit resolution with no missing codes No pipeline delay (SAR architecture) Differential input range: ±VREF (VREF up to 5 V) Throughput: 570 kSPS INL: ±2.5 LSB max (±9.5 ppm of full scale) Dynamic range : 103 dB typ (VREF = 5 V) S/(N+D): 100 dB typ @ 2 kHz (VREF = 5 V) Parallel (18-,16-, or 8-bit bus) and serial 5 V/3 V interface SPI®/QSPI™/MICROWIRE™/DSP compatible On-board reference buffer Single 5 V supply operation Power dissipation: 76 mW @ 500 kSPS; 150 μW @ 1 kSPS 48-lead LQFP or 48-lead LFCSP package Pin-to-pin compatible upgrade of AD7674/AD7676/AD7678

AD7693 - 18-Bit, 250 KSPS PULSAR Differential ADC

Complete 12-Bit Successive Approximation Analog-to-Digital Converters With Three-State Output and 8 us Conversion Features: Complete Monolithic 12-Bit A/D Converters with Reference, Clock, and Three-State Output Buffers Industry Standard Pinout High Speed Upgrades for AD574A 15 µs (Max) Conversion Time (AD674B) 8 µs (Max) Conversion Time (AD774B) ±5 V, ±10 V, 0 V–10 V, 0 V–20 V Input Ranges See datasheet for additional features

Complete 14-Bit, 1.25 MSPS Monolithic A/D Converter Features: Monolithic 14-Bit, 1.25 MSPS A/D Converter Low Power Dissipation: 60 mW Single +5 V Supply Integral Nonlinearity Error: 2.5 LSB Differential Nonlinearity Error: 0.6 LSB Input Referred Noise: 0.36 LSB Signal-to-Noise and Distortion Ratio: 78.0 dB See datasheet for additional features

14-Bit, 80 MSPS/105 MSPS/125 MSPS, 1.8 V Analog-to-Digital Converter Features: 1.8 V analog supply operation 1.8 V to 3.3 V output supply SNR = 71.7 dBc (72.7 dBFS) to 70 MHz input SFDR = 85 dBc to 70 MHz input Low power: 395 mW @ 125 MSPS Differential input with 650 MHz bandwidth On-chip voltage reference and sample-and-hold amplifier DNL = ±0.4 LSB Flexible analog input: 1 V p-p to 2 V p-p range Offset binary, Gray code, or twos complement data format Data output clock and clock duty cycle stabilizer Serial port control Built-in selectable digital test pattern generation Programmable clock and data alignment

10-Bit, 300 MSPS High Speed TxDAC+ D/A Converter Features: 10-Bit Dual Muxed Port DAC 300 MSPS Output Update Rate Excellent SFDR and IMD Performance SFDR to Nyquist @ 25 MHz Output: 64 dB Internal Clock Doubling PLL Differential or Single-Ended Clock Input On-Chip 1.2 V Reference Single 3.3 V Supply Operation Power Dissipation: 155 mW @ 3.3 V 48-Lead LQFP

ADC, Successive Approximation, 16-Bit, 1 Func, 1 Channel, Parallel, Word Access, BICMOS, PDIP28

D/A Converter, 1 Func, Serial Input Loading, 11000us Settling Time, PQFP80

14-Bit, 160 MSPS, 2/4/8 Interpolating Dual TxDAC+ D/A Converter Features: 14-bit resolution, 160 MSPS/400 MSPS input/output data rate Selectable 2×/4×/8× interpolating filter Programmable channel gain and offset adjustment fS/4, fS/8 digital quadrature modulation capability Direct IF transmission mode for 70 MHz + IFs Fully compatible SPI® port Excellent ac performance SFDR: −71 dBc @ 2 MHz to 35 MHz W-CDMA ACPR: −71 dB @ IF = 19.2 MHz Internal PLL clock multiplier See data sheet for additional features