3.0 V to 5.5 V with VIO, 12 kV IEC ESD Protected, Half Duplex 500 kbps RS-485 Transceiver Features: TIA/EIA RS-485 compliant over full supply range 3.0 V to 5.5 V operating voltage range on VCC 1.62 V to 5.5 V VIO logic supply option available ESD protection on the bus pins IEC 61000-4-2 ±12 kV contact discharge IEC 61000-4-2 ≥ ±12 kV air discharge HBM: ≥ ±30 kV Full hot swap support (glitch free power-up/power-down) High speed 50 Mbps data rate (ADM3065E/ADM3066E/ADM3067E/ADM3068E) Low speed 500 kbps data rate for long cables (ADM3061E/ADM3062E/ADM3063E) Full receiver short-circuit, open circuit, and bus idle fail-safe Extended temperature range up to 125°C PROFIBUS compliant at VCC ≥ 4.5 V Half duplex and full duplex models available Allows connection of up to 128 transceivers onto the bus Space-saving package options 10-lead, 3 mm × 3 mm LFCSP 8-lead and 10-lead, 3 mm × 3 mm MSOP 8-lead and 14-lead, narrow body SOIC

Continuous Rate 10 Mbps to 2.7 Gbps Clock and Data Recovery IC Features: Serial data input: 10 Mbps to 2.7 Gbps Exceeds ITU-T jitter specifications Integrated limiting amplifier 5 mV p-p sensitivity (ADN2817 only) Adjustable slice level: ±100 mV (ADN2817 only) Proprietary dual-loop clock recovery architecture Programmable LOS detect (ADN2817 only) Integrated PRBS generator and detector No reference clock required Loss of lock indicator Supports double data rate BERMON or sample phase adjust options Rate selectivity without the use of a reference clock I2C interface to access optional features Single-supply operation: 3.3 V Low power 650 mW (ADN2817) 600 mW (ADN2818) 5 mm × 5 mm 32-lead LFCSP

5 kV rms, 600 Mbps Dual Tx and Rx Channel LVDS Isolator Features: 5 kV rms/3.75 kV rms LVDS isolator Complies with TIA/EIA-644-A LVDS standard Multiple dual-channel configurations Up to 600 Mbps switching with low jitter 4.5 ns maximum propagation delay 151 ps maximum peak-to-peak total jitter at 600 Mbps 100 ps maximum pulse skew 600 ps maximum part to part skew 2.5 V or 3.3 V supplies −75 dBc power supply ripple rejection and glitch immunity ±8 kV IEC 61000-4-2 ESD protection across isolation barrier High common-mode transient immunity: >25 kV/μs Passes EN55022 Class B radiated emissions limits with 600 Mbps PRBS Safety and regulatory approvals (20-lead SOIC package) UL: 5000 V rms for 1 minute per UL 1577 CSA Component Acceptance Notice 5A VDE certificate of conformity DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 VIORM = 424 V peak Fail-safe output high for open, short, and terminated input conditions Operating temperature range: −40°C to +125°C Choice of package and isolation options 3.75 kV rms in highly integrated 20-lead SSOP 5 kV rms in 20-lead SOIC with 7.8 mm creepage/clearance

5 kV RMS/3.75 kV RMS, Dual LVDS Gigabit Isolator (Second Channel Reversed) Features: 5 kV rms and 3.75 kV rms LVDS isolators Complies with TIA/EIA-644-A LVDS standard Multiple dual-channel configurations Any data rate up to 1.1 Gbps switching with low jitter 4 ns typical propagation delay 2.6 ps rms typical random jitter, rms 90 ps typical peak-to-peak total jitter at 1.1 Gbps 2.5 V or 3.3 V supplies −75 dBc power supply ripple rejection, phase spur level Glitch immunity ±8 kV IEC 61000-4-2 ESD protection across isolation barrier High common-mode transient immunity: >25 kV/μs Passes EN 55022 Class B radiated emissions limits with 1.1 Gbps PRBS Safety and regulatory approvals (20-lead SOIC_W package) UL (pending): 5000 V rms for 1 minute per UL 1577 CSA Component Acceptance Notice 5A (pending) VDE certificate of conformity (pending) DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 VIORM = 424 VPEAK Fail-safe output high for open, short, and terminated input conditions (ADN4655/ADN4656) Operating temperature range: −40°C to +125°C 7.8 mm minimum creepage and clearance

250 Mbps, Half Duplex, Quad M-LVDS Transceivers Features: Four M-LVDS transceivers (driver and receiver pairs) Switching rate: 250 Mbps (125 MHz) Independent pin select for each receiver, two modes: Type 1: input hysteresis of 15 mV typical Type 2: differential input threshold voltage offset by 100 mV to support open-circuit, short-circuit, and bus idle fail-safe Compatible with the TIA/EIA-899 standard for M-LVDS Glitch free power-up/power-down on the M-LVDS bus Controlled transition times on the driver output Common-mode range: −1 V to +3.4 V, allowing communication with ±2 V of ground noise Driver outputs high-Z when disabled or powered off Independent enable pins for each driver and receiver Enhanced ESD protection on bus pins ≥±15 kV HBM, air discharge ≥±8 kV HBM, contact discharge ≥±10 kV IEC 61000-4-2, air discharge ≥±8 kV IEC 61000-4-2, contact discharge Enhanced ±8 kV HBM ESD protection for all pins, contact discharge Operating temperature range: −40°C to +105°C Available in 48-lead, 7 mm x 7 mm LFCSP

Mono 2.9 W Class-D Audio Amplifier with Digital Current and Voltage Output Features: Filterless Class-D amplifier with spread-spectrum Σ-Δ modulation Digitized output of output voltage, output current, and PVDD supply voltage 72 dB signal-to-noise ratio (SNR) on output current sensing and 77 dB SNR on output voltage sensing TDM or multichip I2S slave output interface Up to 4 chips supported on a single bus 8 kHz to 48 kHz operation I2S/left justified slave output interface 1 or 2 chips supported on a single bus 8 kHz to 48 kHz operation PDM output interface operates from 1 MHz to 6.144 MHz 2.2 W into 4 Ω load and 1.4 W into 8 Ω load at 5.0 V supply with <1% total harmonic distortion plus noise (THD + N) 89% efficiency at 5.0 V, 1.4 W into 8 Ω + 0.2 Ω RSENSE speaker >100 dB signal-to-noise ratio (SNR) High PSRR at 217 Hz: 86 dB Amplifier supply operation from 2.5 V to 5.5 V Input/output supply operation from 1.42 V to 3.6 V Flexible gain adjustment pin: 0 dB to 12 dB in 3 dB steps with fixed input impedance of 80 kΩ <1 μA shutdown current Smart power-down with loss of BCLK Short-circuit and thermal protection with autorecovery Available in a 16-ball, 0.4 mm pitch, 1.74 mm × 1.74 mm WLCSP Pop-and-click suppression

Low Noise, High Sensitivity Optical Sensor Features: Ultrahigh detectivity photodetector 90 fA/√Hz (typical) ultralow noise floor Signal-to-noise ratio (SNR) near shot noise limit 137 μA (typical) of supply current when active (EE = 0 μW/cm2) 1 μA (typical) of supply current in standby High speed, deep junction photodiode Nominal linear output current: 240 μA (typical) Flexible output configuration Excellent pulse response High ambient light rejection Space-saving, 3 mm × 3 mm LFCSP package

Ultra Low Power ARM Cortex-M4F MCU with Integrated Power Management Features: EEMBC ULPMark™-CP score (3 V): 189 Ultra low power active and hibernate modes Active mode dynamic current: 41 μA/MHz (typical) Flexi mode: 400 μA (typical) Hibernate mode: 0.65 μA (typical) Shutdown mode: 50 nA (typical) Shutdown mode (fast wake-up): 0.20 μA (typical) ARM Cortex-M4F processor at 52 MHz with FPU, MPU, ITM with SWD interface Power management Single-supply operation (connected to VBAT pins): 1.74 V to 3.6 V Optional buck converter for improved efficiency Memory options 512 kB of embedded flash memory with ECC 4 kB of cache memory to reduce active power 128 kB of configurable system SRAM with parity Safety Watchdog with dedicated on-chip oscillator Hardware CRC with programmable polynomial Multiparity bit protected SRAM ECC protected embedded flash Security Hardware cryptographic accelerator supporting AES-128, AES-256, and SHA-256 Protected key storage in flash, SHA-256-based keyed HMAC and key wrap and unwrap User code protection TRNG Digital peripherals 3 SPI interfaces to enable glueless interface to sensors, radios, and converters 1 I2C and 2 UART peripheral interfaces SPORT for natively interfacing with converters and radios Programmable GPIOs (44 in LFCSP and 51 in WLCSP) 3 general-purpose timers with PWM support RGB timer for driving RGB LED RTC0 for time keeping RTC1 with SensorStrobe and time stamping Programmable beeper 27-channel DMA controller Clocking features 26 MHz clock: on-chip oscillator, external crystal oscillator, SYS_CLKIN for external clock, and integrated PLL 32 kHz clock: on-chip oscillator and low power crystal oscillator Clock fail detection for external crystals Analog peripherals 12-bit SAR ADC, 1.8 MSPS, 8 channels, and digital comparator

Ultra Low Power ARM Cortex-M4F MCU with Integrated Power Management Features: EEMBC ULPMark™-CP score (3 V): 189 Ultra low power active and hibernate modes Active mode dynamic current: 41 μA/MHz (typical) Flexi mode: 400 μA (typical) Hibernate mode: 0.65 μA (typical) Shutdown mode: 50 nA (typical) Shutdown mode (fast wake-up): 0.20 μA (typical) ARM Cortex-M4F processor at 52 MHz with FPU, MPU, ITM with SWD interface Power management Single-supply operation (connected to VBAT pins): 1.74 V to 3.6 V Optional buck converter for improved efficiency Memory options 512 kB of embedded flash memory with ECC 4 kB of cache memory to reduce active power 128 kB of configurable system SRAM with parity Safety Watchdog with dedicated on-chip oscillator Hardware CRC with programmable polynomial Multiparity bit protected SRAM ECC protected embedded flash Security Hardware cryptographic accelerator supporting AES-128, AES-256, and SHA-256 Protected key storage in flash, SHA-256-based keyed HMAC and key wrap and unwrap User code protection TRNG Digital peripherals 3 SPI interfaces to enable glueless interface to sensors, radios, and converters 1 I2C and 2 UART peripheral interfaces SPORT for natively interfacing with converters and radios Programmable GPIOs (44 in LFCSP and 51 in WLCSP) 3 general-purpose timers with PWM support RGB timer for driving RGB LED RTC0 for time keeping RTC1 with SensorStrobe and time stamping Programmable beeper 27-channel DMA controller Clocking features 26 MHz clock: on-chip oscillator, external crystal oscillator, SYS_CLKIN for external clock, and integrated PLL 32 kHz clock: on-chip oscillator and low power crystal oscillator Clock fail detection for external crystals Analog peripherals 12-bit SAR ADC, 1.8 MSPS, 8 channels, and digital comparator

Ultra Low Power ARM Cortex-M3 MCU with Integrated Power Management and 256 KB of Embedded Flash Memory Features: EEMBC ULPMark™-CP score: 245.5 Ultra low power active and hibernate mode Active mode dynamic current: 30 μA/MHz (typical) Flexi mode: 300 μA (typical) Hibernate mode: 750 nA (typical) Shutdown mode: 60 nA (typical) ARM Cortex-M3 processor with MPU Up to 26 MHz with serial wire debug interface Power management Single-supply operation (VBAT): 1.74 V to 3.6 V Optional buck converter for improved efficiency Memory options 128 kB/256 kB of embedded flash memory with ECC 4 kB of cache memory to reduce active power 64 kB of configurable system SRAM with parity up to 32 kB of SRAM retained in hibernate mode Safety Watchdog with dedicated on-chip oscillator Hardware CRC with programmable polynomial Multiparity bit protected SRAM ECC protected embedded flash Security TRNG User code protection Hardware cryptographic accelerator supporting AES-128, AES-256, and SHA-256 Digital peripherals 3 SPI interfaces to enable glueless interface to sensors, radios, and converters I2C and UART interfaces SPORT for natively interfacing with converters and radios Programmable GPIOs (44 in LFCSP and 34 in WLCSP) 3 general-purpose timers with PWM support RTC and FLEX_RTC with SensorStrobe and time stamping Programmable beeper 25-channel DMA controller Clocking features 26 MHz clock: on-chip oscillator, external crystal oscillator 32 kHz clock: on-chip oscillator, low power crystal oscillator Integrated PLL with programmable divider Analog peripherals 12-bit SAR ADC, 1.8 MSPS, 8 channels, and digital comparator 

24 GHz VCO and PGAwith 2-Channel PA Output Features: 24 GHz to 24.25 GHz voltage controlled oscillator (VCO) 2-channel 24 GHz power amplifier (PA) with 8 dBm output Single-ended outputs 2-channel muxed outputs with mute function Programmable output power N divider output (frequency discriminator) 24 GHz local oscillator (LO) output buffer 250 MHz signal bandwidth Power control detector Auxiliary 8-bit ADC ±5°C temperature sensor 4-wire serial peripheral interface (SPI) Electrostatic discharge (ESD) performance Human body model (HBM): 2000 V Charged device model (CDM): 250 V Qualified for automotive applications

Real-Time Ethernet Multiprotocol (REM) Switch Features: 144-lead CSP_BGA RoHS compliant package −40°C to +105°C industrial temperature range rating 3.3 V input/output buffers IEEE 802.3, 10 Mbps/100 Mbps, half and full duplex, IPv6 and IPv4 communication 2 independent Ethernet ports: 1 MII and 1 RMII interface per port Support for all industrial protocols PROFINET Class B and Class C with fast startup (Version 2.3) EtherNet/IP with QuickConnect, CIP Sync, and CIP Motion Modbus TCP EtherCAT Ethernet POWERLINK Host interface transfer rate: 32 bits per 28 ns Supports EtherCAT cycle times down to 12.5 μs and PROFINET cycle times down to 31.25 μs PI Net Load Class III capable DLR (supervisor and node, announce and beacon based), MRPD, HSR, PRP, shared device, controller redundancy IEEE 1588Version 2 support: ordinary clock; both peerto peer and end to end transparent clocks, raw frames, and UDP 8 independent timer signals synchronized with an internal precision timer 4 independently programmable timer signals for timer capture events or timer output events 4 timer signals create programmable periodic waveforms synchronized to the internal precision timer DCP, LLDP, DHCP, RSTP, VLAN, IGMP snooping support Forwarding table with aging and learning Drive LEDs for link activity

RMS Power Detector SMT, with Envelope Tracker, DC - 3.9 GHz Features: Broadband Single-Ended RF Input ±1 dB Detection Accuracy to 3.9 GHz Input Dynamic Range: -62 dBm to +8 dBm ±1 dB Envelope Detection Accuracy over 20 dB Input Range Envelope Detection Bandwidth: >150 MHz Digitally Programmable Integration Bandwidth Power-Down Mode 24 Lead 4x4mm SMT Package: 16mm²

20 GHz to 44 GHz, GaAs, pHEMT, MMIC, Low Noise Amplifier Features: Low noise figure: 2 dB typical High gain: 25.0 dB typical P1dB output power: 13.5 dBm, 24 GHz to 40 GHz High output IP3: 25.5 dBm typical Die size: 1.309 mm × 1.48 × 0.102 mm

20 GHz to 44 GHz, GaAs, pHEMT, MMIC, Low Noise Amplifier Features: Low noise figure: 2 dB typical High gain: 25.0 dB typical P1dB output power: 13.5 dBm, 24 GHz to 40 GHz High output IP3: 25.5 dBm typical Die size: 1.309 mm × 1.48 × 0.102 mm

GaAs MMIC I/Q Mixer SMT, 17 - 27 GHz Features: Wide IF Bandwidth: DC - 3.5 GHz Image Rejection: 36 dB LO to RF Isolation: 45 dB High Input IP3: +20 dBm 24 Lead Ceramic 4x4  SMT Package: 16mm²

2.25 GHz to 18 GHz, MMIC, Double Balanced Downconverter Features: Passive: no dc bias required High input IP3: 20 dBm typical LO to RF isolation: 25 dB typical LO to IF isolation: 20 dB typical RF to IF isolation: 15 dB typical IF frequency range: dc to 4 GHz Downconverter applications 3 mm × 3 mm, 12-terminal ceramic leadless chip carrier package

Double Balanced Mixer SMT, 2 - 18 GHz Features: Passive: No DC bias required High input IP3: 23 dBm LO/RF isolation: 38 dB LO/IF isolation: 28 dB RF/IF isolation: 15 dB IF bandwidth: DC - 4 GHz Downconverter applications 12-lead ceramic 3x3 mm SMT package: 9 mm²

GaAs pHEMT MMIC Low Noise Amplifier, 0.3 - 20 GHz Features: Low noise figure: 1.8 dB P1dB output power: 14.5 dBm PSAT output power: 17.5 dBm High gain: 15 dB Output IP3: 29 dBm Supply voltage: VDD = 7 V at 70 mA 50 Ω matched input/output (I/O) 32-lead, 5 mm × 5 mm LFCSP package: 25 mm2HMC1049SCPZ-EP Supports Defense and Aerospace Applications (AQEC standard) Download HMC1049SCPZ-EP data sheet (pdf) Extended industrial temperature range: −55°C to +105°C Controlled manufacturing baseline 1 assembly/test site 1 fabrication site Product change notification Qualification data available on requestV62/19611-01XE DSCC Drawing Number

50 dB, Logarithmic Detector, 1 - 23 GHz Features: Wide Input Bandwidth: 1 to 23 GHz Wide Dynamic Range: 50 dB up to 23 GHz Single Positive Supply: +3.3V Excellent Stability Over Temperature Fast Rise / Fall Time: 12 / 65 ns 16 Lead 3x3 mm SMT Package: 9mm²