GaAs, pHEMT, Low Noise Amplifier, 20 GHz to 54 GHz Features: Gain: 21.5 dB typical at 30 GHz to 44 GHz Input return loss: 22 dB typical at 30 GHz to 44 GHz Output return loss: 23 dB typical at 30 GHz to 44 GHz OP1dB: 14 dB typical at 30 GHz to 44 GHz PSAT: 18 dBm typical at 30 GHz to 44 GHz OIP3: 21.5 dBm typical at 30 GHz to 44 GHz Noise figure: 3.0 dB typical at 30 GHz to 44 GHz 3 V supply voltage at 120 mA 50 Ω matched input and output Die size: 2.3 mm x 1.45 mm x 0.1 mm

GaAs, pHEMT, Low Noise Amplifier, 20 GHz to 54 GHz Features: Gain: 21.5 dB typical at 30 GHz to 44 GHz Input return loss: 22 dB typical at 30 GHz to 44 GHz Output return loss: 23 dB typical at 30 GHz to 44 GHz OP1dB: 14 dB typical at 30 GHz to 44 GHz PSAT: 18 dBm typical at 30 GHz to 44 GHz OIP3: 21.5 dBm typical at 30 GHz to 44 GHz Noise figure: 3.0 dB typical at 30 GHz to 44 GHz 3 V supply voltage at 120 mA 50 Ω matched input and output Die size: 2.3 mm x 1.45 mm x 0.1 mm

10 MHz to 8 GHz Bypass Amplifier Features: Small signal gain of 12.5 dB typical from 10 MHz to 500 MHz Broad operation from 10 MHz to 8000 MHz OIP3 of 34 dBm typical from 10 MHz to 500 MHz Internal amplifier state, output P1dB of 17 dBm typical from 5000 MHz to 8000 MHz Noise figure of 2.8 dB typical from 10 MHz to 500 MHz Low insertion loss of 2 dB typical for the internal bypass switch state from 10 MHz to 500 MHz Wide operating temperature range of −40°C to +85°C RoHS-compliant, 6 mm × 6 mm, 28-terminal LGA ESD rating of ±750 V (Class 1B)

GaAs, pHEMT, MMIC, Low Noise Amplifier, 0.025 GHz to 12 GHz Features:Low noise figure: 2.5 dB typical at 0.025 GHz to 10 GHzSingle positive supply (self biased)High gain: 16.5 dB typical at 0.025 GHz to 10 GHzHigh OIP3: 36 dBm typical at 0.025 GHz to 10 GHzRoHS-compliant, 2 mm 2 mm, 6-lead LFCSP

Wideband, Low Noise Amplifier, Single Positive Supply, 0.01 GHz to 26.5 GHz Features:Single positive supplyLow noise figure: 2.5 dB typical from 0.01 GHz to 14 GHzHigh gain: 17.5 dB typical from 0.01 GHz to 14 GHzOP1dB: 13.5 dBm typical from 0.01 GHz to 20 GHzHigh OIP3: 26 dBm typical from 0.01 GHz to 14 GHzRoHS-compliant, 4 mm 4 mm, 24-lead LFCSP

Wideband, Low Noise Amplifier, Single Positive Supply, 0.01 GHz to 26.5 GHz Features:Single positive supplyLow noise figure: 2.5 dB typical from 0.01 GHz to 14 GHzHigh gain: 17.5 dB typical from 0.01 GHz to 14 GHzOP1dB: 13.5 dBm typical from 0.01 GHz to 20 GHzHigh OIP3: 26 dBm typical from 0.01 GHz to 14 GHzRoHS-compliant, 4 mm 4 mm, 24-lead LFCSP

2 GHz to 28 GHz, GaAs, pHEMT, MMIC Low Noise Amplifier Features: P1dB: 20 dBm typical at 2 GHz to 6 GHz PSAT: 20.5 dBm typical at 2 GHz to 6 GHz Gain: 15.5 dB typical at 6 GHz to 28 GHz Noise figure: 2.5 dB typical at 2 GHz to 20 GHz OIP3: 26 dBm typical at 2 GHz to 6 GHz Supply voltage: 5 V at 53 mA 50 Ω matched input and output ADL9006CHIPS P1dB: 19 dBm typical at 2 GHz to 14 GHz Gain: 15.5 dB typical at 14 GHz to 22 GHz Noise figure: 2.2 dB at 2 GHz to 14 GHz Output IP3: 24 dBm typical at 2 GHz to 14 GHz Power supply voltage: 5 V with a 55 mA total supply current 50 Ω matched input and output

Ultralow Power, Adaptive Linear Power, Dual-Port ADSL/ADSL2+ Line Driver Features: 2 differential DSL channels comprising current feedback, high output current amplifiers with integrated feedback resistors plus biasing network Ideal for use as ADSL/ADSL2+ dual-channel central office (CO) line drivers Low power consumption using Class H technology Single 12.5 V supply operation 20.4 dBm line power, 1:1 transformer Less than 600 mW per channel total power dissipation while driving 20.4 dBm (includes 110 mW line power) Less than 275 mW per channel total power dissipation while driving 14.5 dBm (including line power) High output voltage and current drive 43.4 V differential output voltage swing Low distortion −65 dBc typical multitone power ratio (MTPR) at 20.4 dBm, 26 kHz to 2.2 MHz Low cost protection components enable ITU-T-K20 and GR-1089 compliance

Receiver Front End, Dual-Channel, 1.8 GHz to 2.8 GHz Features: Integrated dual-channel RF front end 2-stage LNA and high power SPDT switch On-chip bias and matching Single-supply operation Gain High gain mode: 35 dB typical at 2.3 GHz Low gain mode: 17 dB typical at 2.3 GHz Low noise figure High gain mode: 1.4 dB typical at 2.3 GHz Low gain mode: 1.4 dB typical at 2.3 GHz High isolation Between RxOUT-ChA and RxOUT-ChB: 50 dB typical Between TERM-ChA and TERM-ChB: 62 dB typical Low insertion loss: 0.6 dB typical at 2.3 GHz High power handling at TCASE = 105°C Full lifetime LTE average power (9 dB PAR): 40 dBm Single event (<10 sec operation) LTE average power (9 dB PAR): 43 dBm High OIP3: 32 dBm typical Power-down mode and low gain mode for LNA Low supply current High gain mode: 85 mA typical at 5V Low gain mode: 35 mA typical at 5 V Power-down mode: 12 mA typical at 5 V Positive logic control 6 mm × 6 mm, 40-lead LFCSP

0.5 dB LSB, 6-Bit, Silicon Digital Attenuator, 9 kHz to 40 GHz Features: Ultrawideband frequency range: 9 kHz to 40 GHz Attenuation range: 0.5 dB steps to 31.5 dB Low insertion loss with impedance match 2.0 dB up to 18 GHz 2.8 dB up to 26 GHz 4.5 dBup to 40 GHz Attenuation accuracy with impedance match ±(0.20 + 1.0% of attenuation state) up to 18 GHz ±(0.20 + 1.5% of attenuation state) up to 26 GHz ±(0.40+ 3.0% of attenuation state) up to 40 GHz Typical step error with impedance match ±0.25 dB up to 26 GHz ±0.65 dB up to 40 GHz High input linearity P0.1dB insertion loss state: 30 dBm P0.1dB other attenuation states: 27 dBm IP3: 50 dBm typical High RF input power handling: 27 dBm average, 30 dBm peak Tight distribution in relative phase No low frequency spurious signals SPI and parallel mode control, CMOS/LVTTL compatible RF amplitude settling time (0.1 dB of final RF output): 8 µs 24-terminal, 4 mm × 4 mm LGA package Pin-compatible with ADRF5730, fast switching version

0.5 dB LSB, 6-Bit, Silicon Digital Attenuator, 100 MHz to 40 GHz Features:Ultrawideband frequency range: 100 MHz to 40 GHz Attenuation range: 0.5 dB steps to 31.5 dB Low insertion loss with impedance match 2.1 dB up to 18 GHz 2.9 dB up to 26 GHz 4.8 dB up to 40 GHz Attenuation accuracy with impedance match ±(0.10 + 1.0% of attenuation state) up to 18 GHz ±(0.15 + 0.8% of attenuation state) up to 26 GHz ±(0.35 + 2.5% of attenuation state) up to 40 GHz Typical step error with impedance match ±0.18 dB up to 18 GHz ±0.23 dB up to 26 GHz ±0.51 dB up to 40 GHz High input linearity P0.1dB insertion loss state: 30 dBm P0.1dB other attenuation states: 27 dBm IP3: 50 dBm typical High RF input power handling: 27 dBm average, 30 dBm peak Tight distribution in relative phase No low frequency spurious signals SPI and parallel mode control, CMOS/LVTTL compatible RF settling time (0.1 dB of final RF output): 250 ns 24-terminal, 4 mm × 4 mm LGA package Pin compatible with ADRF5720, low frequency cutoff version

2 dB LSB, 4-Bit, Silicon Digital Attenuator, 100 MHz to 40 GHz Features: Ultrawideband frequency range: 100 MHz to 40 GHz Attenuation range: 2 dB steps to 30 dB Low insertion loss 1.7 dB to 18 GHz 2.2 dB to 26 GHz 3.5 dB to 40 GHz Attenuation accuracy ±(0.1 + 2.0%) of attenuation state up to 18 GHz ±(0.2 + 2.5%) of attenuation state up to 26 GHz ±(0.5 + 10.0%) of attenuation state up to 40 GHz High RF input power handling: 26 dBm average, 30 dBm peak Tight distribution in relative phase Typical step error ±0.15 dB to 18 GHz ±0.20 dB to 26 GHz ±0.60 dB to 40 GHz High input linearity P0.1dB insertion loss state: 30 dBm P0.1dB other attenuation states: 26 dBm IP3: 50 dBm typical No low frequency spurious signals SPI and parallel mode control, CMOS/LVTTL compatible RF amplitude settling time (0.1 dB of final RF output): 230 ns 2.5 mm × 2.5 mm, 16-terminal LGA package Pin compatible with ADRF5721, low frequency cutoff version

Low Frequency to 3 GHz, Dual VGA with Output Common-Mode and DC Offset Control Features: Dual, matched VGAs Maximum voltage gain: 18 dB Gain control attenuation range: 21 dB typical for TA = 25°C ±1 dB gain flatness bandwidth: 2.5 GHz typical IMD2 and IMD3 (1.5 V p-p output level) −56.8 dBc typical and −75 dBc typical, respectively, at VGN = 1.5 V, 980 MHz and 1000 MHz tones HD2 and HD3 (1.5 V p-p output level) −75 dBc typical and −73.7 dBc typical, respectively, at VGN = 1.5 V, fundamental at 500 MHz −55.9 dBc typical and −57.5 dBc typical, respectively, at VGN = 1.5 V, fundamental at 1 GHz Noise figure: 10.5 dB typical at maximum gain and at 500 MHz 14.8 dB at maximum gain and at 2 GHz Noise figure decreases dB for dB with gain backoff 100 differential input impedance ≤ 16 differential output impedance Programmable Output DC offset nominal range: ± 400 mV Output common-mode control: > ± 200 mV for VOCM = ±0.2 V Single- or dual-supply operation with power-down feature Single supply: VPOS = 5 V, VNEG = 0 V (nominal) Dual supply: VPOS = 3 V, VNEG = −2 V (nominal)

Dual Downconverter with DVGA and PLL/VCO, 450 MHz to 2700 MHz Features:Dual down-converter with integrated fractional-N PLL/VCORF: 450 MHz to 2700 MHz continuousLO frequency: 450 MHz to 2900 MHz, high-side or low-side injection43 dB gain control rangeGain control with up/down and SPIIntegrated RF balun for single-ended 50 inputsPower supply: 3.3 and 5 V8 mm 8 mm, 56-lead LFCSP package

5.9 GHz to 23.6 GHz, Wideband, Microwave Upconverter Features: Wideband RF output frequency range: 5.9 GHz to 23.6 GHz Two upconversion modes Direct conversion from baseband I/Q to RF Single sideband upconversion from real IF LO input frequency range: 5.4 GHz to 14 GHz LO doubler for up to 28 GHz Matched 100 Ω balanced RF output, LO input, and IF input High impedance baseband inputs Sideband suppression and carrier feedthrough optimization Variable attenuator and power detector for Tx power control Programmable via 4-wire SPI interface 32-lead, 5 mm × 5 mm LFCSP microwave packaging

100 MHz to 1000 MHz Integrated Broadband Receiver Features: IQ quadrature demodulator Integrated fractional-N PLL and VCO Gain control range: 60 dB Input frequency range: 100 MHz to 1000 MHz Input P1dB: +12 dBm at 0 dB gain Input IP3: +22.5 dBm at 0 dB gain Noise figure: 11 dB at >39 dB gain, 49 dB at 0 dB gain Baseband 1 dB bandwidth: 250 MHz in wideband mode, 50 MHz in narrow-band mode SPI/I2C serial interface Power supply: +3.3 V/350 mA

Dual Narrow-Band and Wideband RF Transceiver Features: 2 × 2 highly integrated transceiver Frequency range of 30 MHz to 6000 MHz Transmitter and receiver bandwidth from 12 kHz to 40 MHz Two fully integrated, fractional-N, RF synthesizers LVDS and CMOS synchronous serial data interface options Low power monitor and sleep modes Multichip synchronization capabilities Fast frequency hopping Dynamic profile switching for dynamic data rates and sample rates Fully integrated DPD for narrow-band and wideband waveforms Fully programmable via a 4-wire SPI 12 mm × 12 mm, 196-ball CSP_BGA

Integrated Dual RF Receiver Features: Dual receivers Maximum Receiver BW: 200 MHz Fully integrated, fractional-N, RF synthesizers Fully integrated clock synthesizer Multichip phase synchronization for RF LO and baseband clocks JESD204B datapath interface Tuneable range: 75 MHz to 6000 MHz

Integrated, Quad RF Transceiver with Observation Path Features: 4 differential transmitters 4 differential receivers 2 observation receivers with 2 inputs each Center frequency: 75 MHz to 6000 MHz Maximum receiver bandwidth: 200 MHz Maximum transmitter large signal bandwidth: 200 MHz Maximum transmitter synthesis bandwidth: 450 MHz Maximum observation receiver bandwidth: 450 MHz Fully integrated independent fractional-N radio frequency synthesizers Fully integrated clock synthesizer Multichip phase synchronization for all local oscillators and baseband clocks Support for TDD and FDD applications 24.33 Gbps JESD204B/JESD204C digital interface

High Performance Fourth Generation DSP Features: 200 MHz core clock speed 2 Mbits of on-chip RAM FIR, IIR, and FFT accelerators Digital Applications Interface (DAI) enabling user-definable access to peripherals including an S/P DIF Tx/Rx, and 8-channel asynchronous sample rate converter Fully enhanced DMA engine including scatter/gather DMA, delay line DMA 8 serial ports (SPORTs) supporting I2S, left-justified sample pair, and TDM modes Watch Dog Timer Shift Registers 2 SPI-compatible ports supporting master and slave modes UART and Two-Wire Interface 16 Pulse Width Modulation (PWM) channels 3 full-featured timers Small footprint, 88-lead LFCSP and 100-Ld LQFP package options Commercial, Industrial, and automotive temperature ranges available