Understanding Serial LVDS Capture in High-Speed ADCs

This application note describes various schemes of interfacing serialized low-voltage differential signaling (LVDS) data outputs from high-speed analog-to-digital converters (ADCs) to a field-programmable gate arrays (FPGAs) or other application-specific integrated circuit (ASIC)-based receivers. This note provides an introduction to standard one-wire interfaces and other interface variants (such