Implementing DDR2 PCB Layout on the TMS320C6455/C6454 (Rev. E)

Texas Instruments

Published Date: 07/08/2008


This application report contains implementation instructions for the DDR2 interface contained on the TMS320C6454/5 digital signal processor (DSP) device. The approach to specifying interface timing for the DDR2 interface is quite different than on previous devices.

The previous approach specified device timing in terms of data sheet specifications and simulation models. The system designer was


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