Effect of Parasitic Capacitance in Op Amp Circuits (Rev. A)

Texas Instruments

Published Date: 09/28/2000

Description

Parasitic capacitors are formed during normal op amp circuit construction. Op amp design guidelines usually specify connecting a small 20-pF to 100-pF capacitor between the output and negative input and isolating capacitive loads with a small 20-ohm to 100-ohm resistor. This application report analyzes the effects of capacitance at the input and output pins of an op amp and suggests means for