This document provides information on the C6474 module throughput.

This application report describes the design procedure for a small-size, high frequency application using SWIFT™ synchronous buck regulators. It shows that the compensation circuitry of the regul

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bq33100 Top Thirteen Design Considerations bq33100

Ceramic Pin Grid Array (CPGA)

This application report describes the AES algorithm and the use of a suggested C implementation for AES encryption and decryption with MSP430. Note: This document may be subject to the export control

In TI’s line of high-speed analog-to-digital converters (ADCs) with SNRBoost technology output amplitude tends to deviate from its expected value when the applied input amplitude is small. This application note explains this phenomenon and the reasons it occurs.

In many applications, a key design goal is to minimize variations in power delivered to a load as the supply voltage varies. This application brief describes a simple DC brush motor control circuit us

Using 3.3-V Signals for Spartan-3 Configuration and JTAG Ports

How to Configure the bq20z80

This document describes issues of interest related to migration from the TMS320VC5409 to the TMS320VC5416. The objective of this document is to indicate differences between the two devices. Functions that are identical between the two devices are not included. For detailed information on the specific functions of either device refer to the following data sheets and reference guides: TMS320VC5409

In their effort to approximate the ideal op amp manufacturers must not only maximize the open-loop gainand minimize input-referred errors such as offset voltage bias current and noise but must also ensureadequate band-width and settling-time characteristics. Amplifier dynamics are particularly important inapplications like high-speed DAC buffers subranging ADCs S/H circuits ATE pin dr

Application Note 1068 LM3645 Application Information Guide

Interfacing the TLC4541 and the DAC7654 to the MSP430F449

This application report describes an echo canceller system using the Texas Instruments (TI?) TMS320C50 digital signal processor (DSP). The system is based on based on low resolution time-delay estimation using the knowledge that mainly one or two active regions (depending on the number of reflections in the communication channel) characterize the impulse response of a typical echo-path in telepho

The components of each demo board vary by device type and voltage option. Lists of materials are provided which specify the correct external components to be used with each TI part type.