Implementing Single-Chip FPGA Power Solutions

TVP5160 3D Noise Reduction Calibration Procedure

This application report contains implementation instructions for the DDR2 interface contained on the TMS320C6421 digital signal processor (DSP) device. The approach to specifying interface timing for the DDR2 interface is quite different than on previous devices.The previous approach specified device timing in terms of data sheet specifications and simulation models. The system designer was requ

TPS62130 Step-Down Converter with Input Overvoltage Protection

This bulletin describes three techniques for making a precision FVC using a VFC. The standard technique has high precision but high ripple or slow settling. Adding an output filter can improve the settling-time ripple trade-off but adds error. A third new technique can eliminate ripple from the FVC output and improve settling time by more than 1000/1 as compared to the conventional FVC. Moreove

Video Designs Using High-Speed Amplifiers

Normally the output voltage of a switching power supply is higher than the error amplifier reference and so a simple resistive divider between the output voltage and ground at the non-inverting input of the PWM error amplifier is all that is required to set the regulation voltage. However when the output voltage is less than the error amplifier reference voltage the feedback voltage must be div

The best of the monolithic voltage-to-frequency (V/F) converters have performance that is so good itequals or exceeds that of modular types. Some of these ICs can be designed into quite a variety ofcircuits because they are notably versatile. Along with versatility and high performance come theadvantages that are characteristic of all V/F converters including good linearity excellent resol

This application note discusses how to configure the LMH0387 for an equalizer-only application.

The TI 54-ball low-profile fine-pitch ball grid array (TFBGA) meets dimensions specified in JEDEC MO-205 Variation DD. This 0.8-mm-pitch BGA allows economical OEM designs where smaller-pitch 16-bit BGA is either not necessary or is cost prohibitive from a printed circuit board (PCB) fabrication perspective. This BGA is qualified in both the lead (SnPb) and Pb-free (SnAgCu) ball versions at JEDE

The DSP Hardware Designer's Resource Guide is organized by development flow and functional areas to make your design effort as seamless as possible. Topics covered include getting started, board desig

Dynamic Power Path Management and Dynamic Power Management

This application note presents a simple scheme to improve the drop-out voltage in constant-on-time buckregulators.

This article has been contributed to the TI Developer Wiki. To see the most recently updated version or to contribute, visit this topic at:<p> <a href=http://processors.wiki.ti.com/index.php/OMAP35x_

The information in this application report is for current applications using the Texas Instruments ADS7806/07 devices in a surface-mount SO-28 (DW) package. This document helps users with ADS78xx devices through potential compatibility issues when upgrading to the new ADS85xx part series.

The enhanced DMA (EDMA) controller of the TMS320C621x and TMS320C671x devices is a highly efficient data transfer engine controlling all of the data movement beyond the level-two memory of the device. There are sixteen channels and a quick DMA (QDMA) available to perform programmable data transfers giving a great deal of flexibility. With this flexibility comes the responsibility to intelligentl

TPS7B69xx-Q1 Pin FMEA TPS7B69xx-Q1

In the past, simulators did not prove realistic or feasible for debug and performance analysis in the early stages of development. Now, however, advancements in fast simulation technology and analysis