Description

Ultralow Jitter, 4.5GHz PLL with 11 Outputs and JESD204B / JESD204C Support Features: JESD204B/C, Subclass 1 SYSREF Signal Generation Low Noise Integer-N PLL Additive Output Jitter < 6fsRMS (Integration BW = 12kHz to 20MHz, f = 4.5GHz) Additive Output Jitter 65fsRMS (ADC SNR Method) EZSync™, ParallelSync™ Multichip Synchronization –229dBc/Hz Normalized In-Band Phase Noise Floor –281dBc/Hz Normalized In-Band 1/f Noise Eleven Independent, Low Noise Outputs with Programmable Coarse Digital and Fine Analog Delays Flexible Outputs Can Serve as Either a Device Clock or SYSREF Signal Reference Input Frequency up to 500MHz LTC6952Wizard™ Software Design Tool Support –40ºC to 125°C Operating Junction Temperature Range