Description

1.6 GHz Quad Integrated DCL with VHH Drive Capability, Level Setting DACs, and On-Chip Calibration Registers Features: 2 selectable data rates up to 1.6 GHz or 3.2 Gbps maximum toggle rate DCL disable mode (low leakage typically <10 nA) Power and speed programmable (driver and comparators active) 1.025 W power dissipation per channel low speed (Case A) 1.125 W power dissipation per channel high speed (Case B) Voltage driver 3-level driver with high-Z and reflection clamps Voltage range: –1.5 V to +4.5 V (+5 V extended range) Precision trimmed output resistance Functional amplitude (VIH – VIL): 0.05 V minimum to 6.0 V maximum 312.5 ps minimum pulse width (1.0 V programmed swing) 26 ps deterministic jitter and 1.4 ps random jitter Comparator Differential and single-ended window modes Input voltage range: –1.5 V to +4.5 V (+5 V extended range) 130 ps ERT/EFT normal window comparator 1.0 V, terminated Active load: ±12 mA current range VHH drive Dedicated VHH output pin Voltage range: 0.0 V to 13.5 V DC levels Fully integrated and dedicated 16-bit DACs On-chip gain and offset calibration registers with automatic add and multiply functions Package: 9 mm × 9 mm, 121-ball chip scale package ball grid array [CSP_BGA]