Description

Dual 14-Bit, 1 GSPS, Digital-to-Analog Converter Features: Low power: 1.0 W @ 1 GSPS, 600 mW @ 500 MSPS, full operating conditions SFDR = 78 dBc to fOUT = 100 MHz Single carrier WCDMA ACLR = 79 dBc @ 80 MHz IF Novel 2×, 4×, and 8× interpolator/coarse complex modulator allows carrier placement anywhere in DAC bandwidth Analog output: adjustable 8.7 mA to 31.7 mA, RL = 25 Ω to 50 Ω Auxiliary DACs allow control of external VGA and offset control Multiple chip synchronization interface High performance, low noise PLL clock multiplier Digital inverse sinc filter 100-lead, exposed paddle TQFP package