The ADP7142 is a CMOS, low dropout (LDO) linear regulator that operates from 2.7 V to 40 V and provides up to 200 mA of output current. This high input voltage LDO is ideal for the regulation of high performance analog and mixed signal circuits operating from 39 V down to 1.2 V rails. Using an advanced proprietary architecture, the device provides high power supply rejection, low noise, and achieves excellent line and load transient response with a small 2.2 ?F ceramic output capacitor. The ADP7142 regulator output noise is 11 ?V rms independent of the output voltage for the fixed options of 5 V or less.The ADP7142 is available in 15 fixed output voltage options. The following voltages are available from stock: 1.2 V (adjustable), 1.8 V, 2.5 V, 3.3 V, 3.8 V, and 5.0 V. Additional voltages available by special order are 1.5 V, 1.85 V, 2.0 V, 2.2 V, 2.75 V, 2.8 V, 2.85 V, 3.0 V, 4.2 V, and 4.6 V.Each fixed output voltage can be adjusted above the initial set point with an external feedback divider. This allows the ADP7142 to provide an output voltage from 1.2 V to VIN ? VDO with high PSRR and low noise.User programmable soft start with an external capacitor is available in the LFCSP and SOIC packages.The ADP7142 is available in a 6-lead, 2 mm ? 2 mm LFCSP making it not only a very compact solution, but it also provides excellent thermal performance for applications requiring up to 200 mA of output current in a small, low profile footprint. The ADP7142 is also available in a 5-lead TSOT and an 8-lead SOIC.APPLICATIONS Regulation to noise sensitive applications ADC, DAC circuits, precision amplifiers, power for VCO VTUNE control Communications and infrastructure Medical and healthcare Industrial and instrumentation Automotive

The ADP7156 is a linear regulator that operates from 2.3 V to 5.5 V and provides up to 1.2 A of output current. Using an advanced proprietary architecture, it provides high power supply rejection and ultralow noise, achieving excellent line and loadtransient response with only a 10 ?F ceramic output capacitor.There are 16 standard output voltages for the ADP7156. The following voltages are available from stock: 1.2 V, 1.8 V, 2.0 V, 2.5 V, 2.8 V, 3.0 V and 3.3 V. Additional voltages available by special order are 1.3 V, 1.5 V, 1.6 V, 2.2 V, 2.6 V, 2.7 V, 2.9 V, 3.1 V, and 3.2 V.The ADP7156 regulator typical output noise is 0.9 ?V rms from 100 Hz to 100 kHz and 1.7 nV/?Hz for noise spectral density from 10 kHz to 1 MHz. The ADP7156 is available in a 10-lead, 3 mm ? 3 mm LFCSP and 8-lead SOIC packages, making it not only a very compact solution, but also providing excellent thermal performance for applications requiring up to 1.2 A of output current in a small, low profile footprint.Applications Regulation to noise sensitive applications: phase-locked loops (PLLs), voltage controlled oscillators (VCOs), and PLLs with integrated VCOs Communications and infrastructure Backhaul and microwave links

The ADP7159 is an adjustable linear regulator that operates from 2.3 V to 5.5 V and provides up to 2 A of output current. Output voltages from 1.2 V to 3.3 V are possible depending on the model. Using an advanced proprietary architecture, the device provides high power supply rejection and ultralow noise, achieving excellentline and load transient response with only a 10 ?F ceramicoutput capacitor.The ADP7159 is available in four models that optimize powerdissipation and PSRR performance as a function of the inputand output voltage. The typical output noise of the ADP7159 regulator is 0.9 ?V rmsfrom 100 Hz to 100 kHz and 1.7 nV/?Hz for noise spectral densityfrom 10 kHz to 1 MHz. The ADP7159 is available in 10-lead,3 mm ? 3 mm LFCSP and 8-lead SOIC packages, making it notonly a very compact solution, but also providing excellent thermal performance for applications requiring up to 2 A of outputcurrent in a small, low profile footprint.Applications Regulation to noise sensitive applications: phase-locked loops (PLLs), voltage controlled oscillators (VCOs), and PLLs with integrated VCOs Communications and infrastructure Backhaul and microwave links

The ADP8140 provides high current control of up to four LED drivers. Each driver can sink up to 500 mA. The sink current is programmed for all four drivers with one external resistor.The device features a feedback output that controls an external power supply for optimal efficiency. The ADP8140 also protects the LEDs, power supply, and itself against thermal events, short circuits, overvoltages, and LED open circuits. Multiple ADP8140 ICs are easily connected in parallel to drive additional LED strings or higher current LEDs. The ADP8140 is available in a small, thermally enhanced, lead frame chip scale package (LFCSP).Applications High brightness LED lighting Large format LED backlighting

The ADPA7006CHIP is a gallium arsenide (GaAs), pseudomorphic high electron mobility transistor (pHEMT), monolithic microwave integrated circuit (MMIC), distributed power amplifier that operates from 18 GHz to 44 GHz. The amplifier provides 23.5 dB of small signal gain, 29 dBm output power for 1 dB compression, and a typical output third-order intercept of 38 dBm. The ADPA7006CHIP requires 800 mA from a 5 V supply on the supply voltage (VDD), and features inputs and outputs that are internally matched to 50 ?, facilitating integration in multichip modules (MCMs). All data is taken with the chip connected via two 0.025 mm wire bonds that are less than 0.31 mm long. Applications Military and space Test instrumentation Communications

The ADPA7009CHIP is a gallium arsenide (GaAs), pseudomorphic high electron mobility transistor (pHEMT), monolithic microwave integrated circuit (MMIC), 29 dBm saturated output power (0.5 W) distributed power amplifier that operates from 20 GHz to 54 GHz. The amplifier provides a gain of 19.5 dB, an output power for 1 dB compression (P1dB) of 28.5 dBm, and a typical output third-order intercept (IP3) of 35 dBm at 24 GHz to 36 GHz. The ADPA7009CHIP requires 750 mA from a 5 V supply voltage (VDD) and features inputs and outputs that are internally matched to 50 ?, facilitating integration into multichip modules (MCMs). All data is taken with the RFIN and RFOUT pads connected via one 0.076 mm (3 mil) ribbon bond of 0.076 mm (3 mil) minimal length.APPLICATIONS Military and space Test instrumentation Satellite communications

The ADRF5019 is a nonreflective, single pole, double throw (SPDT) RF switch manufactured in a silicon process.The ADRF5019 operates from 100 MHz to 13 GHz with better than 0.8 dB insertion loss and 45 dB of isolation at 8 GHz. TheADRF5019 has a nonreflective design, and the RF ports are internally terminated to 50 ?.The ADRF5019 switch requires a dual supply voltage of +3.3 V and ?2.5 V and positive control voltage inputs. This switchemploys complementary metal-oxide semiconductor (CMOS)-compatible and low voltage transistor transistor logic (LVTTL)-compatible controls.The ADRF5019 can also operate with a single positive supply voltage (VDD) applied. The negative supply voltage (VSS) is tiedto ground. Even in single-supply operation mode, the ADRF5019 can cover the 100 MHz to 13 GHz operating frequency andmaintain good power handling performance. See the Applications Information section for more details.The ADRF5019 is pin-compatible with the HMC1118, the low frequency cutoff version, which operates from 9 kHz to 13.0 GHz.The ADRF5019 comes in a 16-lead, lead frame chip scale package (LFCSP) and operates from ?40?C to +105?C.Applications Test instrumentation Microwave radios and very small aperture terminals (VSATs) Military radios, radars, and electronic counter measures (ECMs) Fiber optics and broadband telecommunications

The ADRF5027 is a nonreflective, single-pole, double-throw (SPDT) radio frequency (RF) switch manufactured in a silicon process.The ADRF5027 operates from 9 kHz to 44 GHz with better than 3.8 dB of insertion loss and 43 dB of isolation. The ADRF5027 features an all off control, where both RF ports are in an isolation state. The ADRF5027 has a nonreflective design and both of the RF ports are internally terminated to 50 ?.The ADRF5027 requires a dual-supply voltage of +3.3 V and ?3.3 V. The device employs complimentary metal-oxide semiconductor/low-voltage transistor-transistor logic (CMOS/LVTTL) logic-compatible controls.The ADRF5027 is pin compatible with the ADRF5026 fast switching version, which operates from 100 MHz to 44 GHz.The ADRF5027 RF ports are designed to match a characteristic impedance of 50 ?. For ultrawideband products, impedance matching on the RF transmission lines can further optimize high frequency insertion loss and return loss characteristics. Refer to the Narrow-Band Impedance Matching section for an example of a matched circuit that achieves a low insertion loss response of 2.2 dB from 28 GHz to 43 GHz.The ADRF5027 comes in a 20-terminal, 3 mm ? 3 mm, RoHS-compliant, land grid array (LGA) package and can operate from ?40?C to +105?C.Applications Industrial scanners Test and instrumentation Cellular infrastructure: 5G mmWave Military radios, radars, electronic counter measures (ECMs) Microwave radios and very small aperture terminals (VSATs)

The ADRF5032 is a reflective, single-pole double-throw (SPDT) switch manufactured in the silicon process. The ADRF5032 operates from 1 GHz to 60 GHz with insertion loss of lower than 2.0 dB and isolation of higher than 32 dB. The device has a RF input power handling capability of 24 dBm for both through path and 21 dBm for hot switching.The ADRF5032 requires dual supply voltages of ?3.3 V. The device employs CMOS and low voltage transistor logic (LVTTL) compatible control.The ADRF5032 comes in a 12-terminal, 2.5 mm ? 2.5 mm, RoHS compliant, land grid array (LGA) package. ADRF5032 can operate from -40?C to +105?C.APPLICATIONSIndustrial scannersTest and instrumentationCellular infrastructure: 5G mmWaveMilitary radios, radars, electronic counter measures (ECMs)Microwave radios and very small aperture terminals (VSATs)

The ADRF5040 is a general-purpose, broadband high isolation, nonreflective single-pole, quad-throw (SP4T) switch in an LFCSP surface-mount package. Covering the 9 kHz to 12.0 GHz range, the switch offers high isolation and low insertion loss. The switch features 34 dB isolation and 0.8 dB insertion loss up to 8.0 GHz, and a 9 ?s settling time of 0.05 dB margin of the final radio frequency output (RFOUT). The switch operates using positive control voltage of 3.3 V and 0 V and requires +3.3 V and ?3.3 V supplies. The ADRF5040 is packaged in a 4 mm ? 4 mm, surface-mount LFCSP package.Applications Test instrumentation Microwave radios and very small aperture terminals (VSATs) Military radios, radars, and electronic counter measures (ECMs) Fiber optics and broadband telecommunications?

The ADRF5042 is a nonreflective SP4T switch manufactured in the silicon on insulator (SOI) process.The ADRF5042 operates from 100 MHz to 44 GHz with an insertion loss of lower than 3.2 dB and an isolation of higher than 35 dB. The device has a RF input power handling capability of 24 dBm for both through and terminated paths.The ADRF5042 requires a dual-supply voltage of +3.3 V and ?3.3 V. The device employs CMOS- and low voltage transistor to transistor logic (LVTTL)-compatible controls.The ADRF5042 has enable and logic select controls to feature all off state and port mirroring, respectively.The ADRF5042 is pin compatible with the ADRF5043 low frequency cutoff version, which operates from 9 kHz to 44 GHz.The ADRF5042 comes in a 24-terminal, 3 mm ? 3 mm, RoHS compliant, land grid array (LGA) package and can operate from ?40?C to +105?C.Applications Industrial Scanners Test instrumentation Cellular infrastructure?millimeterwave (mmWave) 5G Military radios, radars, electronic counter measures (ECMs) Microwave radios and very small aperture terminals (VSATs)

The ADRF5054 is a reflective, single-pole four-throw (SP4T) switch manufactured in the silicon process.This switch operates from 100 MHz to 60 GHz with better than 3.2 dB of insertion loss and 40 dB of isolation. The ADRF5054 has an RF input power handling capability of 24 dBm for the through path.The ADRF5054 draws a low current of 150 ?A on the positive supply of +3.3 V and 520 ?A on negative supply of ?3.3 V.The device employs complementary metal-oxide semiconductor (CMOS)-/low voltage transistor to transistor logic (LVTTL)-compatible controls.The ADRF5054 RF ports are designed to match a characteristic impedance of 50 ?.The ADRF5054 comes in a 24-terminal, 3 mm ? 3 mm, RoHS compliant, land grid array (LGA) package and can operate from ?40?C to +105?C.APPLICATIONSIndustrial ScannerTest instrumentationCellular Infrastructure ? mmWave 5GMilitary radios, radars, and electronic counter measures (ECMs)Microwave radios and very small aperture terminals (VSATs)

The ADRF5132 is a high power, reflective, 0.7 GHz to 5.0 GHz, silicon, single-pole, double-throw (SPDT) reflective switch in a leadless, surface-mount package. The switch is ideal for high power and cellular infrastructure applications, like long-term evolution (LTE) base stations. The ADRF5132 has high power handling of 35 dBm LTE (average typical at 105?C), a low insertion loss of 0.6 dB at 2.7 GHz, input third-order intercept of 65 dBm (typical), and 0.1 dB compression (P0.1dB) of 42.5 dBm.The on-chip circuitry operates at a single, positive supply voltage of 5 V and a typical supply current of 1.1 mA typical, making the ADRF5132 an ideal alternative to pin diode-based switches.The device is in a RoHS compliant, compact, 16-lead, 3 mm ? 3 mm LFCSP package.Applications Cellular/4G infrastructure Wireless infrastructure Military and high reliability applications Test equipment Pin diode replacement

The ADRF5160 is a silicon-based, high power, 0.7 GHz to 4.0 GHz, silicon, single-pole, double-throw (SPDT) reflective switch in a leadless, surface-mount package. The switch is ideal for high power and cellular infrastructure applications, such as long-term evolution (LTE) base stations. The ADRF5160 has high power handling of 41 dBm (8 dB PAR LTE, long-term (>10 years) average typical), a low insertion loss of 0.7 dB typical to 2.0 GHz, an input third-order intercept (IP3) of 70 dBm (typical), and a 0.1 dB compression point (P0.1dB) of 47 dBm. On-chip circuitry operates at a single positive supply voltage of 5 V at a typical supply current of 1.1 mA, making the ADRF5160 an ideal alternative to pin diode-based switches. The ADRF5160 comes in a RoHS compliant, compact 32-lead, 5 mm ? 5 mm LFCSP.Applications Wireless infrastructure Military and high reliability applications Test equipment Pin diode replacement

The ADRF5519 is a dual-channel, integrated RF, front-end multichip module designed for time division duplexing (TDD) applications that operates from 2.3 GHz to 2.8 GHz. The ADRF5519 is configured in dual channels with a cascading two stage low noise amplifier (LNA) and a high power silicon single pole, double-throw (SPDT) switch.In high gain mode, the cascaded two-stage LNA and switch offer a low noise figure (NF) of 1.0 dB and a high gain of 35 dB at 2.6 GHz with an output third-order intercept point (OIP3) of 32 dBm (typical). In low gain mode, one stage of the two-stage LNA is in bypass, providing 14 dB of gain at a lower current of 36 mA. In power-down mode, the LNAs are turned off and the device draws 12 mA.In transmit operation, RF inputs are connected to a termination pin (ANT-CHA or ANT-CHB connected to TERM-CHA or TERM-CHB, respectively). The switch provides a low insertion loss of 0.5 dB and handles a long-term evolution (LTE) average power (9 dB peak to average ratio (PAR)) of 43 dBm for full lifetime operation.The device comes in a RoHS-compliant, compact, 6 mm ? 6 mm, 40-lead LFCSP package.APPLICATIONSWireless infrastructureTDD massive multiple input and multiple output and active antenna systemsTDD-based communication systems

The ADRF5545A is a dual-channel, integrated radio frequency (RF), front-end multichip module designed for time division duplexing (TDD) applications that operates from 2.4 GHz to 4.2 GHz. The ADRF5545A is configured in dual channels with a cascading two-stage low noise amplifier (LNA) and a high power silicon single-pole, double-throw (SPDT) switch.In high gain mode, the cascaded two-stage LNA and switch offer a low noise figure (NF) of 1.45 dB and a high gain of 32 dB at 3.6 GHz with an output third-order intercept point (OIP3) of 32 dBm (typical). In low gain mode, one stage of the two-stage LNA is in bypass, providing 16 dB of gain at a lower current of 36 mA. In power-down mode, the LNAs are turned off and the device draws 12 mA.In transmit operation, when RF inputs are connected to a termination pin (TERM-ChA or TERM-ChB), the switch provides a low insertion loss of 0.65 dB and handles long-term evolution (LTE) average power (9 dB peak to average ratio (PAR)) of 40 dBm for full lifetime operation and 43 dBm for single event (

The ADRF5720 is a silicon, 6-bit digital attenuator with 31.5 dB attenuation control range in 0.5 dB steps.This device operates from 9 kHz to 40 GHz with better than 4.5 dB of insertion loss and excellent attenuation accuracy. The ATTIN port of the ADRF5720 has a radio frequency (RF) input power handling capability of 27 dBm average and 30 dBm peak for all states.The ADRF5720 requires a dual supply voltage of +3.3 V and ?3.3 V. The device features serial peripheral interface (SPI), parallel mode control, and complementary metal-oxide semiconductor (CMOS)-/low voltage transistor to transistor logic (LVTTL)-compatible controls.The ADRF5720 is pin-compatible with the ADRF5730, the fast switching version, which operates from 100 MHz to 40 GHz.The ADRF5720 RF ports are designed to match a characteristic impedance of 50 ?. For wideband applications, impedance matching on the RF transmission lines can further optimize high frequency insertion loss, return loss, and attenuation accuracy characteristics. Refer to the Electrical Specifications section, the Typical Performance Characteristicssection, and the Applications Information section for more details.The ADRF5720 comes in a 24-terminal, 4 mm ? 4 mm, RoHS compliant, land grid array (LGA) package and operates from ?40?C to +105?C.Applications Industrial scanners Test and instrumentation Cellular infrastructure: 5G millimeter wave Military radios, radars, electronic counter measures (ECMs) Microwave radios and very small aperture terminals (VSATs)

The ADRF5740 is a silicon, 4-bit digital attenuator with 22 dB attenuation control range in 2 dB steps.The ADRF5740 operates from 10 MHz to 60 GHz with less than 3.3 dB of insertion loss and with ?(0.2 + 7.0% of attenuation state) of attenuation accuracy at 55 GHz. The ATTIN port of the ADRF5740 has an RF input power handling capability of 24 dBm average and 24 dBm peak for all states.The ADRF5740 requires a dual supply voltage of +3.3 V and ?3.3 V. The ADRF5740 features parallel mode control, and CMOS- and low voltage transistor to transistor logic (LVTTL)-compatible controls.The ADRF5740 RF ports are designed to match a characteristic impedance of 50 ?. The ADRF5740 comes in a 16-terminal, 2.5 mm ? 2.5 mm, RoHS compliant, land grid array (LGA) package and operates from ?40?C to +105?C.Applications Industrial scanners Test and instrumentation Cellular infrastructure: 5G millimeter wave Military radios, radars, electronic counter measures (ECMs) Microwave radios and very small aperture terminals (VSATs)

The ADRV9026 is a highly integrated, radio frequency (RF) agile transceiver offering four independently controlled transmitters, dedicated observation receiver inputs for monitoring each transmitter channel, four independently controlled receivers, integrated synthesizers, and digital signal processing functions providing a complete transceiver solution. The device provides the performance demanded by cellular infrastructure applications, such as small cell base station radios, macro 3G/4G/5G systems, and massive multiple in/multiple out (MIMO) base stations. The receiver subsystem consists of four independent, wide bandwidth, direct conversion receivers with wide dynamic range. The four independent transmitters use a direct conversion modulator resulting in low noise operation with low power consumption. The device also includes two wide bandwidth, time shared, observation path receivers with two inputs each for monitoring transmitter outputs. The complete transceiver subsystem includes automatic and manual attenuation control, dc offset correction, quadrature error correction (QEC), and digital filtering, eliminating the need for these functions in the digital baseband. Other auxiliary functions such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and general-purpose input/outputs (GPIOs) that provide an array of digital control options are also integrated. To achieve a high level of RF performance, the transceiver includes five fully integrated phase-locked loops (PLLs). Two PLLs provide low noise and low power fractional-N RF synthesis for the transmitter and receiver signal paths. A third fully integrated PLL supports an independent local oscillator (LO) mode for the observation receiver. The fourth PLL generates the clocks needed for the converters and digital circuits, and a fifth PLL provides the clock for the serial data interface. A multichip synchronization mechanism synchronizes the phase of all LOs and baseband clocks between multiple ADRV9026 chips. All voltage controlled oscillators (VCOs) and loop filter components are integrated and adjustable through the digital control interface. The serial data interface consists of four serializer lanes and four deserializer lanes. The interface supports both the JESD204B and JESD204C standards, operating at data rates up to 24.33 Gbps. The interface also supports interleaved mode for lower bandwidths, thus reducing the number of high speed data interface lanes to one. Both fixed and floating-point data formats are supported. The floating-point format allows internal automatic gain control (AGC) to be invisible to the demodulator device. The ADRV9026 is powered directly from 1.0 V, 1.3 V, and 1.8 V regulators and is controlled via a standard serial peripheral interface (SPI) serial port. Comprehensive power-down modes are included to minimize power consumption in normal use. The ADRV9026 is packaged in a 14 mm ? 14 mm, 289-ball chip scale ball grid array (CSP_BGA).Applications 3G/4G/5G TDD and FDD massive MIMO, macro and small cell base stations

The ADRV9029 is a highly integrated, radio frequency (RF) agile transceiver offering four independently controlled transmitters, dedicated observation receiver inputs for monitoring each transmitter channel, four independently controlled receivers, integrated synthesizers, and digital signal processing functions providing a complete transceiver solution. The device provides the performance demanded by cellular infrastructure applications, such as small cell base station radios, macro 3G/4G/5G systems, and massive multiple in/multiple out (MIMO) base stations.The receiver subsystem consists of four independent, wide bandwidth, direct conversion receivers with wide dynamic range. The four independent transmitters use a direct conversion modulator resulting in low noise operation with low power consumption. The device also includes two wide bandwidth, time shared, observation path receivers with two inputs each for monitoring transmitter outputs.The complete transceiver subsystem includes automatic and manual attenuation control, dc offset correction, quadrature error correction (QEC), and digital filtering, eliminating the need for these functions in the digital baseband. Other auxiliary functions such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and general-purpose input/ outputs (GPIOs) that provide an array of digital control options are also integrated.To achieve a high level of RF performance, the transceiver includes five fully integrated phase-locked loops (PLLs). Two PLLs provide low noise and low power fractional-N RF synthesis for the transmitter and receiver signal paths. A third fully integrated PLL supports an independent local oscillator (LO) mode for the observation receiver. The fourth PLL generates the clocks needed for the converters and digital circuits, and a fifth PLL provides the clock for the serial data interface.A multichip synchronization mechanism synchronizes the phase of all LOs and baseband clocks between multiple ADRV9029 chips. All voltage controlled oscillators (VCOs) and loop filter components are integrated and adjustable through the digital control interface.This device contains a fully integrated, low power digital predistortion (DPD) adaptation engine for use in power amplifier linearization. DPD enables use of high efficiency power amplifiers, reducing the power consumption of base station radios while also reducing the number of SERDES lanes necessary to interface with baseband processors.The low power crest factor reduction (CFR) engine of the ADRV9029 reduces the peak to average ratio (PAR) of the input signal, enabling higher efficiency transmit line ups while reducing the processing load on baseband processors.The serial data interface consists of four serializer lanes and four deserializer lanes. The interface supports both the JESD204B and JESD204C standards, operating at data rates up to 24.33 Gbps. The interface also supports interleaved mode for lower bandwidths, thus reducing the number of high speed data interface lanes to one. Both fixed and floating-point data formats are supported. The floating-point format allows internal automatic gain control (AGC) to be invisible to the demodulator device.The ADRV9029 is powered directly from 1.0 V, 1.3 V, and 1.8 V regulators and is controlled via a standard serial peripheral interface (SPI) serial port. Comprehensive power-down modes are included to minimize power consumption in normal use. The ADRV9029 is packaged in a 14 mm ? 14 mm, 289-ball chip scale ball grid array (CSP_BGA).APPLICATIONS3G/4G/5G TDD and FDD massive MIMO, macro and small cell base stations