FF1760 MECHANICAL SAMPLE

FFG1153 MECHANICAL SAMPLE

FF1153 MECHANICAL SAMPLE

FPGA Spartan-7 28nm Technology 52160 Cells 1 Speed Grade Commercial Temp 196-Pin CSBGA Tray

Kintex UltraScale FPGA 355950 System Logic Cells 325440 Registers 12.7Mb RAM 304 I/O Surface Mount 900-Pin FPBGA Tray

FPGA Zynq UltraScale+ Family 504000 Cells 20nm Technology 0.85V 1517-Pin FCBGA Tray

License For 3GPP Mixed Mode Turbo Decoder

License For JESD204 Core LogiCORE IP

LOGICORE, VITERBI DECODER (CONVOLUTIONAL ENCODER FREE), SITE

The PCI-X Interface is a pre implemented and fully tested module for Xilinx FPGAs. This significantly reduces engineering time required to implement the PCI-X portion of your design.

The Initiator and Target core for PCI is a pre-implemented and fully tested module for Xilinx FPGAs. The pinout for each device and the relative placement of the internal logic are predefined.

The Xilinx Tri-Mode Ethernet MAC core is a parameterizable core ideally suited for use in networking equipment such as switches and routers. The customizable TEMAC core enables system designers to implement a broad range of integrated Ethernet designs.

Viterbi Decoders are used in systems where data are transmitted and subject to errors before reception. Compatible with many common standards.

FPGA SPARTAN-3AN 1728CELLS 144TQFP; No. of Logic Blocks:1584; No. of Macrocells:1584; FPGA Family:Spartan-3AN; Logic Case Style:TQFP; No. of Pins:144Pins; No. of Speed Grades:4; Total RAM Bits:55296; No. of I/O's:108I/O's; Clock Management:DLL; Core Supply Voltage Min:1.14V; Core Supply Voltage Max:1.26V; I/O Supply Voltage:3.6V; Operating Frequency Max:250MHz; Packaging:Each; Product Range:-; MSL:MSL 3 - 168 hours; Base Number:3; Core Supply Voltage Range:1.14V to 1.26V; Frequency:667MHz; I/O Interface Standard:HSTL LVCMOS LVTTL mini-L RSDS SSTL True LVDS; Logic IC Base Number:3S50; Logic IC Function:FPGA; No. of Gates:50000; Operating Temperature Max:85°C; Operating Temperature Min:0°C; Operating Temperature Range:0°C to +85°C; Programmable Logic Type:FPGA; Termination Type:Surface Mount Device

FPGA Virtex UltraScale+ 1906800 Cells 933MHz 20nm Technology 0.85V 2104-Pin FCBGA Tray

Zynq UltraScale+ FPGA Quad APU Video Engine Mid Speed Flip-chip with 1 mm Ball Pitch 192150 Cells 1.5 GHz 900-Ball FCBGA Tray

FPGA Spartan-7 Family 12800 Cells 28nm Technology 1V 196-Pin FCBGA Tray

FPGA Zynq UltraScale+ 930300 Cells 20nm Technology 0.85V 1517-Pin FCBGA

FPGA Artix-7 Family 12800 Cells 200MHz 28nm 0.95V 238-Pin CSBGA Tray

Universal Serial 10GE Media Independent Interface 32-Bit AXI4-Stream Interface for Data path Rate Adaption onto User Clock Domain