Concurrent Parallel XIP Flash and SRAM Design for code download & execution on High Performance MCUs
Description
This reference design demonstrates how to implement and interface Asynchronous Parallel Flash and SRAM Memories to the performance microcontroller TM4C129. The implementation is made possible by using the EPI Interface in Host Bus 16 Mode with mutliple Chip Selects to interface a 1Gbit-8Mbit range 16-bit Parallel Flash and 16Mbit 16-bit Parallel SRAM allowing developers to expand code and data space above the maximum Internal Memory of the TM4C1294 microcontroller.
Features
- Extend the useable memory space to 1Gbit 16-bit FLASH and 16Mbit 16-bit Asynchronous SRAM with the 60MHz External Peripherial Interface (EPI) for large memory footprint applicationsDesigned for (formerly Tiva MCU) EK-TM4C1294XL Connected LaunchPadImplements Serial boot loader for Programming Parallel Flash in-situ over EPISupports detection of Flash and SRAM connected to EPIScalable Flash Footprint design from 64Mbit to 1GbitSource code contains project examples for Code Composer Studio
Applications
Product Categories
- Arm-based microcontrollers
| Part Number | Name | Companion Part | |
|---|---|---|---|
| SN74LV373A | SN74LV373A | Buy Datasheet | |
| TM4C129DNCPDT | TM4C129DNCPDT | Buy Datasheet | |
| TM4C129DNCZAD | TM4C129DNCZAD | Buy Datasheet | |
| TM4C129ENCPDT | TM4C129ENCPDT | Buy Datasheet | |
| TM4C129ENCZAD | TM4C129ENCZAD | Buy Datasheet | |
| TM4C129XNCZAD | TM4C129XNCZAD | Buy Datasheet | |
| TPD4S012 | TPD4S012 | Buy Datasheet | |
| TPS2052B | TPS2052B | Buy Datasheet |
| Download |
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| Download the bill of materials for TIDM-TM4CFLASHSRAM | Download |
Schematic
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Download the schematic for TIDM-TM4CFLASHSRAMTest Data
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Download the test file for TIDM-TM4CFLASHSRAM| Title | Updated | Type | Size (KB) | |
|---|---|---|---|---|
| Concurrent Parallel XIP Flash and SRAM Design Gerber | 23 Jun 2015 | ZIP | 45 | |
| Concurrent Parallel XIP Flash and SRAM Design BOM | 23 Jun 2015 | 128 | ||
| Concurrent Parallel XIP Flash and SRAM Design Schematics | 23 Jun 2015 | ZIP | 288 |