JESD204B Link Latency Design Using a High Speed ADC
Description
JESD204B links are the latest trend in data-converter digital interfaces. These links take advantage of high-speed serial-digital technology to offer many compelling benefits including improved channel densities. This reference design addresses one of the challenges of adopting the new interface: understanding and designing the link latency. An example achieves deterministic latency and determines the link latency of a system containing the Texas Instruments LM97937 ADC and Xilinx Kintex 7 FPGA.
Features
- Guarantee deterministic latency across the JESD204B linkUnderstand the tradeoff between link latency and tolerance to link delay variationUse a formulaic and procedure-based approach to design the link latencyImplement a JESD204B link using Texas Instruments' ADC16DX370 or LM97937 ADC and a Xilinx Kintex 7 FPGA
Applications
- Oscilloscopes & digitizers
- Small cell base station
- Spectrum analyzer
- Active antenna system mMIMO (AAS)
- Vector signal transceiver (VST)
- Macro remote radio unit (RRU)
- Wireless communications test
Product Categories
- RF & microwave
| Download the bill of materials for TIDA-00153 | Download |
Design File
Download ready-to-use system files to speed your design process. Get Viewer.
Download the design file for TIDA-00153| Title | Updated | Type | Size (KB) | |
|---|---|---|---|---|
| TIDA-00153 Gerber | 19 Feb 2014 | ZIP | 706 | |
| TIDA-00153 BOM | 19 Feb 2014 | 75 | ||
| TIDA-00153 Hardware Setup | 19 Feb 2014 | 162 |