Xilinx Virtex UltraScale FPGA Power Solution with PMBus Reference Design
Description
The PMP9475 12V-input reference design provides all the power supply rails necessary to power Xilinx's Virtex® UltraScale™ family of FPGAs in a compact: highly efficient design. This design uses several of TI's PMBus Point-Of-Load voltage regulators for ease of design/configuration and telemetry of critical rails. It features a UCD90120A for flexible power up and power down sequencing as well as voltage monitoring: current monitoring: and voltage margining through the PMBus interface.
Features
- Provides all the power supply rails needed for a Xilinx Virtex® UltraScale™ FPGADesign optimized to support a 12V inputOn board power up and power down sequencingPMBUS interface with output voltage and current reportingVoltage margining feature
Applications
- Oscilloscopes & digitizers
- Baseband unit (BBU)
- Edge router
- Intra-DC interconnect (metro)
- Inter-DC interconnect (long-haul
- submarine)
- Core router
- Performance client
- High performance computing
- Data acquisition (DAQ)
- Active antenna system mMIMO (AAS)
- Multifunction relay
- Processor module
- Wired communication modules
- Indoor backhaul
- Campus & branch switches
- Cell site gateway router
- Multi-access edge computing (MEC)
- Data center switch
- Macro remote radio unit (RRU)
Product Categories
- Power management
| Download the bill of materials for PMP9475 | Download |
Design File
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Download the test file for PMP9475| Title | Updated | Type | Size (KB) | |
|---|---|---|---|---|
| PMP9475 CAD Files | 05 Aug 2014 | ZIP | 2704 | |
| PMP9475 BOM | 05 Aug 2014 | 106 | ||
| PMP9475 Schematic | 05 Aug 2014 | 1397 |