Xilinx Virtex Ultrascale FPGA Multi-Gigabit Transceiver (MGT) Power Reference Design with PMBus
Description
The PMP9407 reference design provides all the power supply rails necessary to power the multi-gigabit transcievers (MGT) in Xilinx's Virtex® Ultrascale™ FPGAs. This design uses a 5V input and has a PMBus interface for current and voltage monitoring: margining: timing delays: and fault monitoring. It uses two TPS544B20's which feature internal current sensing and eliminate the need for an external current sense resistor. This design also meets Xilinx's low output voltage ripple requirements of the MGT rails.
Features
- Provides all the power rails needed to power MGT rails in a Xilinx Virtex® Ultrascale™ FPGADesign optimized to support a 5V inputLow output voltage ripple On board power up and power down sequencingPMBUS interface with output voltage and current reportingMGTAVCC and MGTAVTT have lossless MOSFET current sensing: eliminates need for sense resistor
Applications
- Baseband unit (BBU)
- Edge router
- Intra-DC interconnect (metro)
- Inter-DC interconnect (long-haul
- submarine)
- Core router
- Performance client
- High performance computing
- Active antenna system mMIMO (AAS)
- Indoor backhaul
- Campus & branch switches
- Cell site gateway router
- Multi-access edge computing (MEC)
- Data center switch
- Macro remote radio unit (RRU)
Product Categories
- Power management
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| Download the bill of materials for PMP9407 | Download |
Test Data
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Download the test file for PMP9407| Title | Updated | Type | Size (KB) | |
|---|---|---|---|---|
| PMP9407 Block Diagram | 10 Sep 2014 | 105 | ||
| PMP9407 Gerber | 08 Aug 2014 | ZIP | 702 | |
| PMP9407 BOM | 08 Aug 2014 | 87 | ||
| PMP9407 Schematic | 08 Aug 2014 | 233 |