Power Management for C667x DSP AVS Core (CVDD)
Description
The C667x power management reference design is optimized to power the core voltage (CVCC) of TI's Keystone multicore DSP. The C66x series uses SmartReflex technology to enable the DSP to control its supply voltage to attain optimal performance and low power consumption. The design features a 2-
Features
- Wide VDD range = 4.5V to 20V Achieves up to 90% peak efficiency at 1V output Less than 2.5% total DC voltage error exceeds DSP's requirement Low ripple voltage ( Provides up to 25A in a 45x25
Applications
- Video Conferencing: IP-Based HD
- Video Communications System
- Broadcast Infrastructure
| Part Number | Name | Companion Part | |
|---|---|---|---|
| LM10011 | LM10011 | Buy Datasheet | |
| TMS320C6654 | TMS320C6654 | Buy Datasheet | |
| TMS320C6655 | TMS320C6655 | Buy Datasheet | |
| TMS320C6657 | TMS320C6657 | Buy Datasheet | |
| TMS320C6670 | TMS320C6670 | Buy Datasheet | |
| TMS320C6671 | TMS320C6671 | Buy Datasheet | |
| TMS320C6672 | TMS320C6672 | Buy Datasheet | |
| TMS320C6674 | TMS320C6674 | Buy Datasheet | |
| TMS320C6678 | TMS320C6678 | Buy Datasheet | |
| TPS40322 | TPS40322 | Buy Datasheet |
| Download the bill of materials for PMP7303 | Download |
Design File
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Download the design file for PMP7303Test Data
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Download the test file for PMP7303| Title | Updated | Type | Size (KB) | |
|---|---|---|---|---|
| PMP7303 Gerber | 16 Aug 2013 | ZIP | 419 | |
| PMP7303 BOM | 16 Aug 2013 | 54 | ||
| PMP7303 Schematic | 16 Aug 2013 | 62 |