This reference design generates a 5V/36A output from a standard 48V telecom input. Two UCC2891controllers are configured to control two interleaved active-clamp forward power stages. The secondary circuitry implements self-driven synchronous rectifiers for a highly efficient design. Splitting the power into two paralleled power stages reduces conduction losses and allows this design to achieve efficiencies greater than 94 percent.
| Download the bill of materials for PMP4016 | Download |
| Title | Updated | Type | Size (KB) | |
|---|---|---|---|---|
| PMP4016 PCB | 16 Nov 2012 | 129 | ||
| PMP4016 Gerber | 16 Nov 2012 | ZIP | 154 | |
| PMP4016 BOM | 16 Nov 2012 | 19 | ||
| PMP4016 Schematic | 16 Nov 2012 | 129 |