Dual-phase compact reference design for 2.7 V 60 A for telecommunications
Description
This reference design uses only 2 ICs in a stacked configuration to provide 2.7 V at 60 A in a compact form factor. Both an all ceramics output capacitors version and a low ESR polymer output capacitors version were demonstrated to meet requirement of less than 3% undershoot for a step load from 2 A to 60 A in less than 1 microsecond. Internal compensation simplifies the design process. Design includes on-board high speed dynamic load tester: output ripple probe interface and test points for a stability analyzer.
Features
- 2.7 V at 60 A with only two 5-mm by 7-mm ICsMeets less than 3% voltage undershoot for step load from 2 A to 60 A in under 1 microsecondVerified to meet this performance with either all ceramic out capacitors or with polymer output capacitorsRich test interface: including on-board: high speed dynamic load
Applications
- Baseband unit (BBU)
- Active antenna system mMIMO (AAS)
Product Categories
- Power management