Xilinx Virtex® UltraScale™ FPGA Multi-Gigabit Transceiver (MGT) Power Solution
Description
The PMP10520 reference design provides all the power supply rails (1V/20A: 1.2V/30A: 1.8V/4A) necessary to power the multi-gigabit transcievers (MGT) in Xilinx's Virtex® Ultrascale™ FPGAs. This design uses a 5V input and has a PMBus interface for current and voltage monitoring: margining: timing delays: and fault monitoring. It uses both TPS544C20 and TPS544B20 which feature internal current sensing and eliminate the need for an external current sense resistor. This design also meets Xilinx's low output voltage ripple requirements of the MGT rails.
Features
- Provides all the power rails needed to power MGT rails in a Xilinx Virtex® Ultrascale™ FPGADesign optimized to support a 5V inputLow output voltage ripple On board power up and power down sequencing using LM3880POL's include integrated PMBUS interface with output voltage and current reportingMGTAVCC and MGTAVTT have lossless MOSFET current sensing: eliminates need for sense resistor
Applications
- Baseband unit (BBU)
- Edge router
- Intra-DC interconnect (metro)
- Inter-DC interconnect (long-haul
- submarine)
- Core router
- Performance client
- High performance computing
- Active antenna system mMIMO (AAS)
- Processor module
- Indoor backhaul
- Campus & branch switches
- Cell site gateway router
- Multi-access edge computing (MEC)
- Data center switch
- Macro remote radio unit (RRU)
Product Categories
- Power management
| Download the bill of materials for PMP10520 | Download |
Design File
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Download the design file for PMP10520| Title | Updated | Type | Size (KB) | |
|---|---|---|---|---|
| PMP10520 Gerber | 25 Sep 2014 | ZIP | 852 | |
| PMP10520 BOM | 25 Sep 2014 | 87 | ||
| PMP10520 Schematic | 25 Sep 2014 | 1062 |