Search results

While many developers consider XDS560 Trace a valuable tool for debugging difficult scenarios it also provides quick and effective profiling techniques. With the capability of Trace to capture timestamps on each sample and the flexibility of Advanced Event Triggering to capture data at the appropriate locations XDS560 Trace provides unique profiling capabilities. This application note focuses on

The reference design PMP9464 utilizes the LMZ31530: a 30A SIMPLE SWITCHER® Power Module. The LMZ31530 SIMPLE SWITCHER® power module is an easy-to-use integrated power solution that combines a 30-A DC/DC converter with power MOSFETs: a shielded inductor: and passives into a low profile: QFN package.This design has a LM25056 on the front end. The LM25056 combines high performance analog and digital technology with a PMBus compliant SMBus/I2C interface to accurately measure the operating conditions of electrical systems including computing and storage blades connected to a backplane power bus. This allows the user to monitor the real time values of Vin: Iin: Pin and Pout; as well as temperature and peak power. These values are reported via PMBus™/SMBus™/I2C.PMP9464 also enables the user to margin the output voltage setting: by slewing it up or down. This is done with the LM10011 VID programmable current DAC. The LP2951 supplies a 3.3V rail for the LM3881 power sequencer. The LM3881 sequencer can be used for sequencing other off board power supplies.

This PMP4507 delivers 3.3V@3A or 5V@2A from a PoE source: standard 13W limit. The converter accepts also an external voltage from an adapter ranging 12V to 54V input.

The AD5590 is a 16-channel input and 16-channel output analog I/O port with eight uncommitted amplifiers, operating from a single 4.5 V to 5.25 V supply. The AD5590 comprises 16 input channels multiplexed into a 1 MSPS, 12-bit successive approximation ADC with a sequencer to allow a preprogrammed selection of channels to be converted sequentially. The ADC contains a low noise, wide bandwidth track-and-hold amplifier that can handle input frequencies in excess of 1 MHz.The conversion process and data acquisition are controlled using ASYNC and the serial clock signal, allowing the device to easily interface with microprocessors or DSPs. The input signal is sampled on the falling edge of ASYNC and conversion is also initiated at this point. There are no pipeline delays associated with the ADC. By setting the relevant bits in the control register, the analog input range for the ADC can be selected to be a 0 V to VREFA input or a 0 V to 2 ? VREFA with either straight binary or twos complement output coding. The conversion time is determined by the ASCLK frequency because it is also used as the master clock to control the conversion.The DAC section of the AD5590 comprises sixteen 12-bit DACs divided into two groups of eight. Each group has an on-chip reference. The on-board references are off at power-up, allowing the use of external references. The internal references are enabled via a software write.The AD5590 incorporates a power-on reset circuit that ensures that the DAC outputs power up to 0 V and remain powered up at this level until a valid write takes place. The DAC contains a power-down feature that reduces the current consumption of the device and provides software-selectable output loads while in power-down mode for any or all DAC channels. The outputs of all DACs can be updated simultaneously using the LDAC function, with the added functionality of user-selectable DAC channels to simultaneously update. There is also an asynchronous CLR that updates all DACs to a user-programmable code: zero scale, midscale, or full scale.The AD5590 contains eight low noise, single-supply amplifiers. These amplifiers can be used for signal conditioning for the ADCs, DACs, or other independent circuitry, if required.APPLICATIONS Optical Line Cards (Monitoring and Control) Base Stations General Purpose Analog I/O Monitoring and control

DC1422A-C: Demo Board for the LTC6605-14 Dual Matched 14MHz Filter with Low Noise, Low Distortion Differential Amplifier.

The LTM9011-14/LTM9010-14/LTM9009-14 are 8-channel, simultaneous sampling 14-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. AC performance includes 73.1dB SNR and 88dB spurious free dynamic range (SFDR). Low power consumption per channel reduces heat in high channel count applications. Integrated bypass capacitance and flow-through pinout reduces overall board space requirements.DC specs include ?1LSB INL (typ), ?0.3LSB DNL (typ) and no missing codes over temperature. The transition noise is a low 1.2LSBRMS.The digital outputs are serial LVDS to minimize the number of data lines. Each channel outputs two bits at a time (2-lane mode). At lower sampling rates there is a one bit per channel option (1-lane mode).The ENC+ and ENC? inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An internal clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles.Applications Communications Cellular Base Stations Software Defined Radios Portable Medical Imaging Multichannel Data Acquisition Nondestructive Testing

This application report discusses the process of replacing the CLC016 reclocker with the LMH0026 reclocker.

DC1449A: Demo Board for the LT8415 Ultralow Power Boost Converter with Dual Half-Bridge Switches.

This application note explains the basic operation of the two-switch Flyback-power stage, and clarifies benefits and design restrictions not present in traditional Flyback-topology. Power st

The LTC6811 is a multicell battery stack monitor that measures up to 12 series connected battery cells with a total measurement error of less than 1.2mV. The cell measurement range of 0V to 5V makes the LTC6811 suitable for most battery chemistries. All 12 cells can be measured in 290?s, and lower data acquisition rates can be selected for high noise reduction.Multiple LTC6811 devices can be connected in series, permitting simultaneous cell monitoring of long, high voltage battery strings. Each LTC6811 has an isoSPI interface for high speed, RF-immune, long distance communications. Using the LTC6811-1, multiple devices are connected in a daisy chain with one host processor connection for all devices. Using the LTC6811-2, multiple devices are connected in parallel to the host processor, with each device individually addressed.The LTC6811 can be powered directly from the battery stack or from an isolated supply. The LTC6811 includes passive balancing for each cell, with individual PWM duty cycle control for each cell. Other features include an onboard 5V regulator, five general purpose I/O lines and a sleep mode, where current consumption is reduced to 4?A.Applications Electric and Hybrid Electric Vehicles Backup Battery Systems Grid Energy Storage High Power Portable Equipment

TAS5110D6REF Data Report

This active power factor correction: transition mode: isolated flyback generates a constant current of 350mA on an LED string from high line (180 to 264Vac). The output accepts a voltage range of 40 to 120V. Open LED protection (overvoltage) and safety discharge of output capacitors are implemented as well.

The Cyclone III power management design is a complete: non-isolated power solution and provides all 5 required rails for powering the FPGA. The design also includes complete power solutions for DDR Memory VTT and VDDQ rails and USB power. This design is optimized to power the Altera 3C25F324 starter kit.

Automotive buck for 5V @1A w/ TPS54140 and input filter to attenuate reflected ripple to source

PMP8877 is a full-function 1/8th brick isolated DC/DC telecom power module based on the UCD3138 digital power controller. The reference design features secondary side control and hard switching full bridge power topology to deliver 12V/180W of output power operating across a wide range 36V-72V input source. The highlights of the reference design include 94% peak efficiency: fast input voltage feedforward response to input voltage surges: constant current/constant power overload protection: pre-bias start-up: current sharing control for paralleled module applications and PMBUS support for communication with peer controllers. The bias supply block employs the UCC25230: while the gate drivers used in this design include UCC27524 for driving the SR MOSFETs and UCC27211 for driving the primary side Half-Bridge MOSFETs. Other components include the ISO7240 for sending signals across the isolation barrier.

The PMP4401 is a 12Vin: ±5Vout: 1W reference design module which is implemented in an industry standard SIP pinout. It includes a constant on-time synchronous Fly-Buck controller LM25018. The solution has high efficiency and good line and load regulation with 1:500V DC isolation. The power module was designed with minimized components for cost sensitive applications. PMP4394: PMP4401: and PMP4412-PM4415 have the same pinout and can be replaced by each other without modification. The isolated bipolar outputs make the design ideal for powering noise sensitive circuits used in industrial applications.